Search

Dirk Wright

Examiner (ID: 11999, Phone: (571)272-7098 , Office: P/3659 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3656, 3659, 3622, 3655, 2899, 3681
Total Applications
4396
Issued Applications
4127
Pending Applications
57
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1130947 [patent_doc_number] => 06791878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-14 [patent_title] => 'Word line decoder in nand type flash memory device' [patent_app_type] => B2 [patent_app_number] => 10/310033 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4645 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/791/06791878.pdf [firstpage_image] =>[orig_patent_app_number] => 10310033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/310033
Word line decoder in nand type flash memory device Dec 4, 2002 Issued
Array ( [id] => 6636431 [patent_doc_number] => 20030103376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method for driving memory cells of a dynamic semiconductor memory and circuit configuration' [patent_app_type] => new [patent_app_number] => 10/310930 [patent_app_country] => US [patent_app_date] => 2002-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2953 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20030103376.pdf [firstpage_image] =>[orig_patent_app_number] => 10310930 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/310930
Method for driving memory cells of a dynamic semiconductor memory and circuit configuration Dec 4, 2002 Issued
Array ( [id] => 6681990 [patent_doc_number] => 20030117854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Dual cell reading and writing technique' [patent_app_type] => new [patent_app_number] => 10/310533 [patent_app_country] => US [patent_app_date] => 2002-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7152 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20030117854.pdf [firstpage_image] =>[orig_patent_app_number] => 10310533 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/310533
Dual cell reading and writing technique Dec 3, 2002 Abandoned
Array ( [id] => 6636601 [patent_doc_number] => 20030103394 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Semiconductor storage device and method for remedying defects of memory cells' [patent_app_type] => new [patent_app_number] => 10/308434 [patent_app_country] => US [patent_app_date] => 2002-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 17527 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20030103394.pdf [firstpage_image] =>[orig_patent_app_number] => 10308434 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/308434
Semiconductor storage device and method for remedying defects of memory cells Dec 2, 2002 Issued
Array ( [id] => 1180233 [patent_doc_number] => 06751131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Semiconductor storage device and information apparatus' [patent_app_type] => B2 [patent_app_number] => 10/308835 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 16760 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751131.pdf [firstpage_image] =>[orig_patent_app_number] => 10308835 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/308835
Semiconductor storage device and information apparatus Dec 1, 2002 Issued
Array ( [id] => 7459557 [patent_doc_number] => 20040100845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'TECHNIQUE FOR SENSING THE STATE OF A MAGNETO-RESISTIVE RANDOM ACCESS MEMORY' [patent_app_type] => new [patent_app_number] => 10/305736 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3039 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20040100845.pdf [firstpage_image] =>[orig_patent_app_number] => 10305736 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305736
Technique for sensing the state of a magneto-resistive random access memory Nov 26, 2002 Issued
Array ( [id] => 1204641 [patent_doc_number] => 06721231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-04-13 [patent_title] => 'Semiconductor memory device, memory system and electronic instrument' [patent_app_type] => B2 [patent_app_number] => 10/306832 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3532 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/721/06721231.pdf [firstpage_image] =>[orig_patent_app_number] => 10306832 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306832
Semiconductor memory device, memory system and electronic instrument Nov 26, 2002 Issued
Array ( [id] => 1306287 [patent_doc_number] => 06625074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-23 [patent_title] => 'Sense amplifier with improved read access' [patent_app_type] => B2 [patent_app_number] => 10/304491 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 10000 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/625/06625074.pdf [firstpage_image] =>[orig_patent_app_number] => 10304491 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/304491
Sense amplifier with improved read access Nov 25, 2002 Issued
Array ( [id] => 7465092 [patent_doc_number] => 20040095800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'METHOD AND SYSTEM FOR CONTROLLING AN SRAM SENSE AMPLIFIER CLOCK' [patent_app_type] => new [patent_app_number] => 10/299931 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4580 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20040095800.pdf [firstpage_image] =>[orig_patent_app_number] => 10299931 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/299931
Apparatus for cleaning a substrate Nov 18, 2002 Issued
Array ( [id] => 6812652 [patent_doc_number] => 20030072202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell' [patent_app_type] => new [patent_app_number] => 10/298591 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 19949 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20030072202.pdf [firstpage_image] =>[orig_patent_app_number] => 10298591 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/298591
Semiconductor device, data processing system and a method for changing threshold of a non-volatile memory cell Nov 18, 2002 Issued
Array ( [id] => 1185355 [patent_doc_number] => 06738298 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Automatic reference voltage regulation in a memory device' [patent_app_type] => B1 [patent_app_number] => 10/298830 [patent_app_country] => US [patent_app_date] => 2002-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5015 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738298.pdf [firstpage_image] =>[orig_patent_app_number] => 10298830 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/298830
Automatic reference voltage regulation in a memory device Nov 17, 2002 Issued
Array ( [id] => 6868792 [patent_doc_number] => 20030081481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-01 [patent_title] => 'PRIORITY ENCODER CIRCUIT AND METHOD FOR CONTENT ADDRESSABLE MEMORY' [patent_app_type] => new [patent_app_number] => 10/291645 [patent_app_country] => US [patent_app_date] => 2002-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4884 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20030081481.pdf [firstpage_image] =>[orig_patent_app_number] => 10291645 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/291645
Priority encoder circuit and method for content addressable memory Nov 11, 2002 Issued
Array ( [id] => 6812627 [patent_doc_number] => 20030072177 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Non-volatile memory with improved sensing and method therefor' [patent_app_type] => new [patent_app_number] => 10/290558 [patent_app_country] => US [patent_app_date] => 2002-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8375 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20030072177.pdf [firstpage_image] =>[orig_patent_app_number] => 10290558 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/290558
Non-volatile memory with improved sensing and method therefor Nov 6, 2002 Issued
Array ( [id] => 1183296 [patent_doc_number] => 06744690 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Asynchronous input data path technique for increasing speed and reducing latency in integrated circuit devices incorporating dynamic random access memory (DRAM) arrays and embedded DRAM' [patent_app_type] => B1 [patent_app_number] => 10/289736 [patent_app_country] => US [patent_app_date] => 2002-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744690.pdf [firstpage_image] =>[orig_patent_app_number] => 10289736 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/289736
Asynchronous input data path technique for increasing speed and reducing latency in integrated circuit devices incorporating dynamic random access memory (DRAM) arrays and embedded DRAM Nov 6, 2002 Issued
Array ( [id] => 6790986 [patent_doc_number] => 20030086330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-08 [patent_title] => 'Expanded operating frequency synchronous semiconductor memory device having wave pipeline structure and wave pipeline control method thereof' [patent_app_type] => new [patent_app_number] => 10/288830 [patent_app_country] => US [patent_app_date] => 2002-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5483 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0086/20030086330.pdf [firstpage_image] =>[orig_patent_app_number] => 10288830 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/288830
Expanded operating frequency synchronous semiconductor memory device having wave pipeline structure and wave pipeline control method thereof Nov 5, 2002 Issued
Array ( [id] => 6859945 [patent_doc_number] => 20030090953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Semiconductor memory card, method of controlling the same and interface apparatus for semiconductor memory card' [patent_app_type] => new [patent_app_number] => 10/288636 [patent_app_country] => US [patent_app_date] => 2002-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10279 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0090/20030090953.pdf [firstpage_image] =>[orig_patent_app_number] => 10288636 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/288636
Semiconductor memory card, method of controlling the same and interface apparatus for semiconductor memory card Nov 4, 2002 Issued
Array ( [id] => 6651912 [patent_doc_number] => 20030076720 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'First bit databurst firing of IO equilibrating ending signal based on column access signal' [patent_app_type] => new [patent_app_number] => 10/284928 [patent_app_country] => US [patent_app_date] => 2002-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0076/20030076720.pdf [firstpage_image] =>[orig_patent_app_number] => 10284928 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/284928
First bit databurst firing of IO equilibrating ending signal based on column access signal Oct 30, 2002 Issued
Array ( [id] => 6622234 [patent_doc_number] => 20030210570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Non-volatile semiconductor memory device capable of high-speed data reading' [patent_app_type] => new [patent_app_number] => 10/283130 [patent_app_country] => US [patent_app_date] => 2002-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7378 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20030210570.pdf [firstpage_image] =>[orig_patent_app_number] => 10283130 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/283130
Non-volatile semiconductor memory device capable of high-speed data reading Oct 29, 2002 Issued
Array ( [id] => 1145355 [patent_doc_number] => 06781898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-24 [patent_title] => 'Self-repairing built-in self test for linked list memories' [patent_app_type] => B2 [patent_app_number] => 10/283134 [patent_app_country] => US [patent_app_date] => 2002-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4402 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/781/06781898.pdf [firstpage_image] =>[orig_patent_app_number] => 10283134 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/283134
Self-repairing built-in self test for linked list memories Oct 29, 2002 Issued
Array ( [id] => 6667685 [patent_doc_number] => 20030112668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Semiconductor storage device' [patent_app_type] => new [patent_app_number] => 10/258334 [patent_app_country] => US [patent_app_date] => 2002-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 20364 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0112/20030112668.pdf [firstpage_image] =>[orig_patent_app_number] => 10258334 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/258334
Semiconductor storage device Oct 20, 2002 Issued
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