Search

Dirk Wright

Examiner (ID: 11999, Phone: (571)272-7098 , Office: P/3659 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3656, 3659, 3622, 3655, 2899, 3681
Total Applications
4396
Issued Applications
4127
Pending Applications
57
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6395690 [patent_doc_number] => 20020181280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Nonvolatile semiconductor memory device and electronic information apparatus' [patent_app_type] => new [patent_app_number] => 10/154531 [patent_app_country] => US [patent_app_date] => 2002-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10488 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20020181280.pdf [firstpage_image] =>[orig_patent_app_number] => 10154531 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/154531
Nonvolatile semiconductor memory device and electronic information apparatus May 21, 2002 Issued
Array ( [id] => 1314903 [patent_doc_number] => 06618286 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-09 [patent_title] => 'Non-volatile semiconductor memory device with a memory array preventing generation of a through current path' [patent_app_type] => B2 [patent_app_number] => 10/146031 [patent_app_country] => US [patent_app_date] => 2002-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 7506 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/618/06618286.pdf [firstpage_image] =>[orig_patent_app_number] => 10146031 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/146031
Non-volatile semiconductor memory device with a memory array preventing generation of a through current path May 15, 2002 Issued
Array ( [id] => 1247722 [patent_doc_number] => 06678200 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-13 [patent_title] => 'Systems and methods for communicating with memory blocks' [patent_app_type] => B2 [patent_app_number] => 10/145834 [patent_app_country] => US [patent_app_date] => 2002-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5790 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/678/06678200.pdf [firstpage_image] =>[orig_patent_app_number] => 10145834 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/145834
Systems and methods for communicating with memory blocks May 13, 2002 Issued
Array ( [id] => 6321033 [patent_doc_number] => 20020196672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/144036 [patent_app_country] => US [patent_app_date] => 2002-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6611 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20020196672.pdf [firstpage_image] =>[orig_patent_app_number] => 10144036 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/144036
Semiconductor memory device May 13, 2002 Issued
Array ( [id] => 5844611 [patent_doc_number] => 20020132465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Reconfigurable integrated circuit memory' [patent_app_type] => new [patent_app_number] => 10/143200 [patent_app_country] => US [patent_app_date] => 2002-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7268 [patent_no_of_claims] => 87 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20020132465.pdf [firstpage_image] =>[orig_patent_app_number] => 10143200 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/143200
Reconfigurable integrated circuit memory May 12, 2002 Abandoned
Array ( [id] => 1231654 [patent_doc_number] => 06697296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-24 [patent_title] => 'Clock synchronous semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/140937 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 28 [patent_no_of_words] => 16574 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697296.pdf [firstpage_image] =>[orig_patent_app_number] => 10140937 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/140937
Clock synchronous semiconductor memory device May 8, 2002 Issued
Array ( [id] => 6257231 [patent_doc_number] => 20020186611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-12 [patent_title] => 'Semiconductor memory device having hierarchical word line structure' [patent_app_type] => new [patent_app_number] => 10/139334 [patent_app_country] => US [patent_app_date] => 2002-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10366 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20020186611.pdf [firstpage_image] =>[orig_patent_app_number] => 10139334 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/139334
Semiconductor memory device having hierarchical word line structure May 6, 2002 Issued
Array ( [id] => 1310581 [patent_doc_number] => 06621742 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'System for programming a flash memory device' [patent_app_type] => B1 [patent_app_number] => 10/136033 [patent_app_country] => US [patent_app_date] => 2002-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 1843 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/621/06621742.pdf [firstpage_image] =>[orig_patent_app_number] => 10136033 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/136033
System for programming a flash memory device Apr 28, 2002 Issued
Array ( [id] => 7622985 [patent_doc_number] => 06687180 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Driver control circuit' [patent_app_type] => B2 [patent_app_number] => 10/132032 [patent_app_country] => US [patent_app_date] => 2002-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 9010 [patent_no_of_claims] => 54 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687180.pdf [firstpage_image] =>[orig_patent_app_number] => 10132032 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/132032
Driver control circuit Apr 24, 2002 Issued
Array ( [id] => 1234520 [patent_doc_number] => 06693837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-17 [patent_title] => 'System and method for quick self-refresh exit with transitional refresh' [patent_app_type] => B2 [patent_app_number] => 10/128936 [patent_app_country] => US [patent_app_date] => 2002-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5468 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/693/06693837.pdf [firstpage_image] =>[orig_patent_app_number] => 10128936 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/128936
System and method for quick self-refresh exit with transitional refresh Apr 22, 2002 Issued
Array ( [id] => 1409956 [patent_doc_number] => 06545895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'High capacity SDRAM memory module with stacked printed circuit boards' [patent_app_type] => B1 [patent_app_number] => 10/127036 [patent_app_country] => US [patent_app_date] => 2002-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5418 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/545/06545895.pdf [firstpage_image] =>[orig_patent_app_number] => 10127036 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/127036
High capacity SDRAM memory module with stacked printed circuit boards Apr 21, 2002 Issued
Array ( [id] => 6507593 [patent_doc_number] => 20020191477 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'A write circuit of a memory deivce' [patent_app_type] => new [patent_app_number] => 10/127368 [patent_app_country] => US [patent_app_date] => 2002-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6715 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20020191477.pdf [firstpage_image] =>[orig_patent_app_number] => 10127368 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/127368
Write circuit of a memory device Apr 21, 2002 Issued
Array ( [id] => 1372656 [patent_doc_number] => 06574164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-03 [patent_title] => 'tRCD margin' [patent_app_type] => B2 [patent_app_number] => 10/126412 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2882 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574164.pdf [firstpage_image] =>[orig_patent_app_number] => 10126412 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126412
tRCD margin Apr 18, 2002 Issued
Array ( [id] => 6395946 [patent_doc_number] => 20020181317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'TRCD MARGIN' [patent_app_type] => new [patent_app_number] => 10/126730 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2887 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20020181317.pdf [firstpage_image] =>[orig_patent_app_number] => 10126730 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126730
tRCD margin Apr 18, 2002 Issued
Array ( [id] => 6395796 [patent_doc_number] => 20020181295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'TRCD margin' [patent_app_type] => new [patent_app_number] => 10/126424 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20020181295.pdf [firstpage_image] =>[orig_patent_app_number] => 10126424 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126424
TRCD margin Apr 18, 2002 Issued
Array ( [id] => 1376723 [patent_doc_number] => 06570787 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Programming with floating source for low power, low leakage and high density flash memory devices' [patent_app_type] => B1 [patent_app_number] => 10/126330 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4644 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570787.pdf [firstpage_image] =>[orig_patent_app_number] => 10126330 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126330
Programming with floating source for low power, low leakage and high density flash memory devices Apr 18, 2002 Issued
Array ( [id] => 6395865 [patent_doc_number] => 20020181305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'TRCD MARGIN' [patent_app_type] => new [patent_app_number] => 10/126413 [patent_app_country] => US [patent_app_date] => 2002-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20020181305.pdf [firstpage_image] =>[orig_patent_app_number] => 10126413 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/126413
tRCD margin Apr 18, 2002 Issued
Array ( [id] => 6173030 [patent_doc_number] => 20020154540 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Magnetic memory' [patent_app_type] => new [patent_app_number] => 10/119833 [patent_app_country] => US [patent_app_date] => 2002-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 12040 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20020154540.pdf [firstpage_image] =>[orig_patent_app_number] => 10119833 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/119833
Magnetic memory Apr 10, 2002 Issued
Array ( [id] => 7632107 [patent_doc_number] => 06665229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-16 [patent_title] => 'Semiconductor memory device row decoder structures having reduced layout area, and methods of operating the same' [patent_app_type] => B2 [patent_app_number] => 10/122131 [patent_app_country] => US [patent_app_date] => 2002-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 5601 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/665/06665229.pdf [firstpage_image] =>[orig_patent_app_number] => 10122131 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/122131
Semiconductor memory device row decoder structures having reduced layout area, and methods of operating the same Apr 10, 2002 Issued
Array ( [id] => 1319711 [patent_doc_number] => 06611452 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Reference cells for TCCT based memory cells' [patent_app_type] => B1 [patent_app_number] => 10/117930 [patent_app_country] => US [patent_app_date] => 2002-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4666 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611452.pdf [firstpage_image] =>[orig_patent_app_number] => 10117930 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/117930
Reference cells for TCCT based memory cells Apr 4, 2002 Issued
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