Search

Dirk Wright

Examiner (ID: 11999, Phone: (571)272-7098 , Office: P/3659 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3656, 3659, 3622, 3655, 2899, 3681
Total Applications
4396
Issued Applications
4127
Pending Applications
57
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1322733 [patent_doc_number] => 06608780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-19 [patent_title] => 'High performance semiconductor memory devices' [patent_app_type] => B2 [patent_app_number] => 10/116787 [patent_app_country] => US [patent_app_date] => 2002-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 34 [patent_no_of_words] => 8551 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/608/06608780.pdf [firstpage_image] =>[orig_patent_app_number] => 10116787 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/116787
High performance semiconductor memory devices Apr 3, 2002 Issued
Array ( [id] => 1268839 [patent_doc_number] => 06661686 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-09 [patent_title] => 'Content addressable memory having dynamic match resolution' [patent_app_type] => B1 [patent_app_number] => 10/112630 [patent_app_country] => US [patent_app_date] => 2002-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 9425 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/661/06661686.pdf [firstpage_image] =>[orig_patent_app_number] => 10112630 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/112630
Content addressable memory having dynamic match resolution Mar 28, 2002 Issued
Array ( [id] => 1346277 [patent_doc_number] => 06594179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-15 [patent_title] => 'Floating gate type nonvolatile semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 10/106035 [patent_app_country] => US [patent_app_date] => 2002-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/594/06594179.pdf [firstpage_image] =>[orig_patent_app_number] => 10106035 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106035
Floating gate type nonvolatile semiconductor memory Mar 26, 2002 Issued
Array ( [id] => 1417123 [patent_doc_number] => 06538953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-25 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/103999 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 76 [patent_no_of_words] => 34796 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538953.pdf [firstpage_image] =>[orig_patent_app_number] => 10103999 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/103999
Semiconductor memory device Mar 24, 2002 Issued
Array ( [id] => 1582488 [patent_doc_number] => 06449191 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Current-mode sense amplifier with low power consumption' [patent_app_type] => B1 [patent_app_number] => 10/063137 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3972 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449191.pdf [firstpage_image] =>[orig_patent_app_number] => 10063137 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/063137
Current-mode sense amplifier with low power consumption Mar 24, 2002 Issued
Array ( [id] => 1247732 [patent_doc_number] => 06678206 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-13 [patent_title] => 'Semiconductor memory device including standby mode for reducing current consumption of delay locked loop' [patent_app_type] => B2 [patent_app_number] => 10/106931 [patent_app_country] => US [patent_app_date] => 2002-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4068 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/678/06678206.pdf [firstpage_image] =>[orig_patent_app_number] => 10106931 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/106931
Semiconductor memory device including standby mode for reducing current consumption of delay locked loop Mar 24, 2002 Issued
Array ( [id] => 5903521 [patent_doc_number] => 20020141232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Magnetic memory device' [patent_app_type] => new [patent_app_number] => 10/102634 [patent_app_country] => US [patent_app_date] => 2002-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20020141232.pdf [firstpage_image] =>[orig_patent_app_number] => 10102634 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/102634
Magnetic memory device Mar 21, 2002 Issued
Array ( [id] => 1372489 [patent_doc_number] => 06574152 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Circuit design for accepting multiple input voltages for flash EEPROM memory operations' [patent_app_type] => B1 [patent_app_number] => 10/104736 [patent_app_country] => US [patent_app_date] => 2002-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4829 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574152.pdf [firstpage_image] =>[orig_patent_app_number] => 10104736 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/104736
Circuit design for accepting multiple input voltages for flash EEPROM memory operations Mar 21, 2002 Issued
Array ( [id] => 1470005 [patent_doc_number] => 06459622 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-01 [patent_title] => 'Twin MONOS memory cell usage for wide program' [patent_app_type] => B1 [patent_app_number] => 10/099030 [patent_app_country] => US [patent_app_date] => 2002-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4853 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/459/06459622.pdf [firstpage_image] =>[orig_patent_app_number] => 10099030 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/099030
Twin MONOS memory cell usage for wide program Mar 14, 2002 Issued
Array ( [id] => 1376924 [patent_doc_number] => 06570799 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Precharge and reference voltage technique for dynamic random access memories' [patent_app_type] => B1 [patent_app_number] => 10/099333 [patent_app_country] => US [patent_app_date] => 2002-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3234 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570799.pdf [firstpage_image] =>[orig_patent_app_number] => 10099333 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/099333
Precharge and reference voltage technique for dynamic random access memories Mar 13, 2002 Issued
Array ( [id] => 5966274 [patent_doc_number] => 20020089878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-11 [patent_title] => 'Integrated circuit having an EEPROM and flash EPROM' [patent_app_type] => new [patent_app_number] => 10/099291 [patent_app_country] => US [patent_app_date] => 2002-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3764 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20020089878.pdf [firstpage_image] =>[orig_patent_app_number] => 10099291 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/099291
Integrated circuit having an EEPROM and flash EPROM Mar 11, 2002 Issued
Array ( [id] => 6422859 [patent_doc_number] => 20020126523 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-12 [patent_title] => 'Semiconductor integrated circuit device including a cache having a comparator and a memory' [patent_app_type] => new [patent_app_number] => 10/095030 [patent_app_country] => US [patent_app_date] => 2002-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8691 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20020126523.pdf [firstpage_image] =>[orig_patent_app_number] => 10095030 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/095030
Semiconductor integrated circuit device including a cache having a comparator and a memory Mar 11, 2002 Issued
Array ( [id] => 1310540 [patent_doc_number] => 06621737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-16 [patent_title] => 'Circuit and associated method for the erasure or programming of a memory cell' [patent_app_type] => B2 [patent_app_number] => 10/096531 [patent_app_country] => US [patent_app_date] => 2002-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 6805 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/621/06621737.pdf [firstpage_image] =>[orig_patent_app_number] => 10096531 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/096531
Circuit and associated method for the erasure or programming of a memory cell Mar 10, 2002 Issued
Array ( [id] => 1423506 [patent_doc_number] => 06529402 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'Low power static memory' [patent_app_type] => B1 [patent_app_number] => 10/094533 [patent_app_country] => US [patent_app_date] => 2002-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 1826 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/529/06529402.pdf [firstpage_image] =>[orig_patent_app_number] => 10094533 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/094533
Low power static memory Mar 7, 2002 Issued
Array ( [id] => 986658 [patent_doc_number] => 06925028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-02 [patent_title] => 'DRAM with multiple virtual bank architecture for random row access' [patent_app_type] => utility [patent_app_number] => 10/473632 [patent_app_country] => US [patent_app_date] => 2002-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3509 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/925/06925028.pdf [firstpage_image] =>[orig_patent_app_number] => 10473632 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/473632
DRAM with multiple virtual bank architecture for random row access Mar 5, 2002 Issued
Array ( [id] => 6371833 [patent_doc_number] => 20020118586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-29 [patent_title] => 'Integrated semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/084134 [patent_app_country] => US [patent_app_date] => 2002-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2658 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20020118586.pdf [firstpage_image] =>[orig_patent_app_number] => 10084134 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/084134
Integrated semiconductor memory device Feb 26, 2002 Issued
Array ( [id] => 6173037 [patent_doc_number] => 20020154545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-24 [patent_title] => 'Non-volatile memory device with plurality of threshold voltage distributions' [patent_app_type] => new [patent_app_number] => 10/082335 [patent_app_country] => US [patent_app_date] => 2002-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 14906 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20020154545.pdf [firstpage_image] =>[orig_patent_app_number] => 10082335 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/082335
Non-volatile memory device with plurality of threshold voltage distributions Feb 25, 2002 Issued
Array ( [id] => 1258924 [patent_doc_number] => 06667925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-12-23 [patent_title] => 'Semiconductor device having temperature detecting function, testing method, and refresh control method of semiconductor storage device having temperature detecting function' [patent_app_type] => B2 [patent_app_number] => 10/081232 [patent_app_country] => US [patent_app_date] => 2002-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 13623 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/667/06667925.pdf [firstpage_image] =>[orig_patent_app_number] => 10081232 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/081232
Semiconductor device having temperature detecting function, testing method, and refresh control method of semiconductor storage device having temperature detecting function Feb 24, 2002 Issued
Array ( [id] => 1358560 [patent_doc_number] => 06580653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-17 [patent_title] => 'Current saving semiconductor memory and method' [patent_app_type] => B2 [patent_app_number] => 10/079436 [patent_app_country] => US [patent_app_date] => 2002-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 28 [patent_no_of_words] => 9251 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580653.pdf [firstpage_image] =>[orig_patent_app_number] => 10079436 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/079436
Current saving semiconductor memory and method Feb 18, 2002 Issued
Array ( [id] => 1384444 [patent_doc_number] => 06567323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-20 [patent_title] => 'Memory circuit redundancy control' [patent_app_type] => B2 [patent_app_number] => 10/077432 [patent_app_country] => US [patent_app_date] => 2002-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5158 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/567/06567323.pdf [firstpage_image] =>[orig_patent_app_number] => 10077432 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/077432
Memory circuit redundancy control Feb 14, 2002 Issued
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