Search

Dirk Wright

Examiner (ID: 11999, Phone: (571)272-7098 , Office: P/3659 )

Most Active Art Unit
3502
Art Unit(s)
3502, 3656, 3659, 3622, 3655, 2899, 3681
Total Applications
4396
Issued Applications
4127
Pending Applications
57
Abandoned Applications
218

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1488578 [patent_doc_number] => 06366503 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-04-02 [patent_title] => 'Semiconductor storage device' [patent_app_type] => B2 [patent_app_number] => 09/741635 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5332 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366503.pdf [firstpage_image] =>[orig_patent_app_number] => 09741635 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/741635
Semiconductor storage device Dec 18, 2000 Issued
Array ( [id] => 1450068 [patent_doc_number] => 06370078 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Way to compensate the effect of coupling between bitlines in a multi-port memories' [patent_app_type] => B1 [patent_app_number] => 09/740604 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4264 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/370/06370078.pdf [firstpage_image] =>[orig_patent_app_number] => 09740604 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740604
Way to compensate the effect of coupling between bitlines in a multi-port memories Dec 18, 2000 Issued
Array ( [id] => 6030739 [patent_doc_number] => 20020018369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-02-14 [patent_title] => 'Non-volatile semiconductor memory device having a stable read margin' [patent_app_type] => new [patent_app_number] => 09/737736 [patent_app_country] => US [patent_app_date] => 2000-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5778 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20020018369.pdf [firstpage_image] =>[orig_patent_app_number] => 09737736 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/737736
Non-volatile semiconductor memory device having a stable read margin Dec 17, 2000 Issued
Array ( [id] => 1488621 [patent_doc_number] => 06366515 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-04-02 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 09/737737 [patent_app_country] => US [patent_app_date] => 2000-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 76 [patent_no_of_words] => 34809 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366515.pdf [firstpage_image] =>[orig_patent_app_number] => 09737737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/737737
Semiconductor memory device Dec 17, 2000 Issued
Array ( [id] => 4384151 [patent_doc_number] => 06288936 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Nonvolatile memory for storing multivalue data' [patent_app_type] => 1 [patent_app_number] => 9/734233 [patent_app_country] => US [patent_app_date] => 2000-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 9165 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288936.pdf [firstpage_image] =>[orig_patent_app_number] => 734233 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734233
Nonvolatile memory for storing multivalue data Dec 11, 2000 Issued
Array ( [id] => 1570391 [patent_doc_number] => 06377504 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'High-density memory utilizing multiplexers to reduce bit line pitch constraints' [patent_app_type] => B1 [patent_app_number] => 09/735336 [patent_app_country] => US [patent_app_date] => 2000-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4761 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/377/06377504.pdf [firstpage_image] =>[orig_patent_app_number] => 09735336 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/735336
High-density memory utilizing multiplexers to reduce bit line pitch constraints Dec 11, 2000 Issued
Array ( [id] => 1499195 [patent_doc_number] => 06404672 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-06-11 [patent_title] => 'Magnetic element and magnetic memory device' [patent_app_type] => B2 [patent_app_number] => 09/732030 [patent_app_country] => US [patent_app_date] => 2000-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2966 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404672.pdf [firstpage_image] =>[orig_patent_app_number] => 09732030 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/732030
Magnetic element and magnetic memory device Dec 6, 2000 Issued
Array ( [id] => 6973270 [patent_doc_number] => 20010003508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-14 [patent_title] => 'Semiconductor memory device capable of performing stable read operation and read method thereof' [patent_app_type] => new-utility [patent_app_number] => 09/731459 [patent_app_country] => US [patent_app_date] => 2000-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3396 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20010003508.pdf [firstpage_image] =>[orig_patent_app_number] => 09731459 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731459
Semiconductor memory device capable of performing stable read operation and read method thereof Dec 5, 2000 Issued
Array ( [id] => 6893544 [patent_doc_number] => 20010015910 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-23 [patent_title] => 'Non-volatile semiconductor memory device with improved erase algorithm' [patent_app_type] => new [patent_app_number] => 09/731537 [patent_app_country] => US [patent_app_date] => 2000-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4068 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20010015910.pdf [firstpage_image] =>[orig_patent_app_number] => 09731537 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731537
Non-volatile semiconductor memory device with improved erase algorithm Dec 5, 2000 Issued
Array ( [id] => 6921098 [patent_doc_number] => 20010028583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-11 [patent_title] => 'Semiconductor memory device having data parallel/serial conversion function and capable of efficiently performing operational test' [patent_app_type] => new [patent_app_number] => 09/725856 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8498 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20010028583.pdf [firstpage_image] =>[orig_patent_app_number] => 09725856 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/725856
Semiconductor memory device having data parallel/serial conversion function and capable of efficiently performing operational test Nov 29, 2000 Issued
Array ( [id] => 1410286 [patent_doc_number] => 06545912 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Erase verify mode to evaluate negative Vt\'s' [patent_app_type] => B1 [patent_app_number] => 09/727656 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2783 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/545/06545912.pdf [firstpage_image] =>[orig_patent_app_number] => 09727656 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/727656
Erase verify mode to evaluate negative Vt's Nov 29, 2000 Issued
Array ( [id] => 6878018 [patent_doc_number] => 20010002173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-05-31 [patent_title] => 'Semiconductor storage device and production method thereof' [patent_app_type] => new-utility [patent_app_number] => 09/725633 [patent_app_country] => US [patent_app_date] => 2000-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6389 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20010002173.pdf [firstpage_image] =>[orig_patent_app_number] => 09725633 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/725633
Semiconductor storage device and production method thereof Nov 28, 2000 Issued
Array ( [id] => 4286737 [patent_doc_number] => 06324099 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => '2-bit/cell type nonvolatile semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 9/721656 [patent_app_country] => US [patent_app_date] => 2000-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 20 [patent_no_of_words] => 5862 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/324/06324099.pdf [firstpage_image] =>[orig_patent_app_number] => 721656 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/721656
2-bit/cell type nonvolatile semiconductor memory Nov 26, 2000 Issued
Array ( [id] => 1461115 [patent_doc_number] => 06426897 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-30 [patent_title] => 'Method of erasing a flash memory device' [patent_app_type] => B1 [patent_app_number] => 09/721936 [patent_app_country] => US [patent_app_date] => 2000-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1468 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/426/06426897.pdf [firstpage_image] =>[orig_patent_app_number] => 09721936 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/721936
Method of erasing a flash memory device Nov 26, 2000 Issued
Array ( [id] => 1589968 [patent_doc_number] => 06359811 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Semiconductor integrated circuit with random access memory testing' [patent_app_type] => B1 [patent_app_number] => 09/721932 [patent_app_country] => US [patent_app_date] => 2000-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5239 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359811.pdf [firstpage_image] =>[orig_patent_app_number] => 09721932 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/721932
Semiconductor integrated circuit with random access memory testing Nov 26, 2000 Issued
Array ( [id] => 4345051 [patent_doc_number] => 06314047 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Low cost alternative to large dual port RAM' [patent_app_type] => 1 [patent_app_number] => 9/713560 [patent_app_country] => US [patent_app_date] => 2000-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5089 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/314/06314047.pdf [firstpage_image] =>[orig_patent_app_number] => 713560 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/713560
Low cost alternative to large dual port RAM Nov 14, 2000 Issued
Array ( [id] => 7639154 [patent_doc_number] => 06396763 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'DRAM having a reduced chip size' [patent_app_type] => B1 [patent_app_number] => 09/708656 [patent_app_country] => US [patent_app_date] => 2000-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2565 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/396/06396763.pdf [firstpage_image] =>[orig_patent_app_number] => 09708656 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/708656
DRAM having a reduced chip size Nov 8, 2000 Issued
Array ( [id] => 4380743 [patent_doc_number] => 06275410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Data recording systems and methods for facilitating data recovery with emitter failure' [patent_app_type] => 1 [patent_app_number] => 9/710356 [patent_app_country] => US [patent_app_date] => 2000-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4318 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275410.pdf [firstpage_image] =>[orig_patent_app_number] => 710356 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/710356
Data recording systems and methods for facilitating data recovery with emitter failure Nov 8, 2000 Issued
Array ( [id] => 1567651 [patent_doc_number] => 06339554 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Semiconductor memory device with replacement programming circuit' [patent_app_type] => B1 [patent_app_number] => 09/705731 [patent_app_country] => US [patent_app_date] => 2000-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6821 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339554.pdf [firstpage_image] =>[orig_patent_app_number] => 09705731 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/705731
Semiconductor memory device with replacement programming circuit Nov 5, 2000 Issued
Array ( [id] => 4416370 [patent_doc_number] => 06272054 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-07 [patent_title] => 'Twin-cell memory architecture with shielded bitlines for embedded memory applications' [patent_app_type] => 1 [patent_app_number] => 9/702336 [patent_app_country] => US [patent_app_date] => 2000-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2524 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/272/06272054.pdf [firstpage_image] =>[orig_patent_app_number] => 702336 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/702336
Twin-cell memory architecture with shielded bitlines for embedded memory applications Oct 30, 2000 Issued
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