
Diva Kakar Chander
Examiner (ID: 18550)
| Most Active Art Unit | 3763 |
| Art Unit(s) | 3763 |
| Total Applications | 355 |
| Issued Applications | 281 |
| Pending Applications | 2 |
| Abandoned Applications | 77 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20291899
[patent_doc_number] => 20250317142
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-09
[patent_title] => OVER DRIVE CIRCUIT AND INPUT/OUTPUT CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/673265
[patent_app_country] => US
[patent_app_date] => 2024-05-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673265
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/673265 | OVER DRIVE CIRCUIT AND INPUT/OUTPUT CIRCUIT | May 22, 2024 | Pending |
Array
(
[id] => 20368116
[patent_doc_number] => 20250357928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-20
[patent_title] => LOW DISTORTION LEVEL SHIFTER
[patent_app_type] => utility
[patent_app_number] => 18/663698
[patent_app_country] => US
[patent_app_date] => 2024-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663698
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/663698 | LOW DISTORTION LEVEL SHIFTER | May 13, 2024 | Pending |
Array
(
[id] => 20358734
[patent_doc_number] => 12474727
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-18
[patent_title] => Voltage generation circuit and semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/663832
[patent_app_country] => US
[patent_app_date] => 2024-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 2424
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 271
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18663832
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/663832 | Voltage generation circuit and semiconductor device | May 13, 2024 | Issued |
Array
(
[id] => 19632315
[patent_doc_number] => 20240410764
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => TEMPERATURE SENSOR CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 18/660128
[patent_app_country] => US
[patent_app_date] => 2024-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6000
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660128
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/660128 | TEMPERATURE SENSOR CIRCUITS | May 8, 2024 | Pending |
Array
(
[id] => 19421516
[patent_doc_number] => 20240297640
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => PWM SIGNAL GENERATOR CIRCUIT AND RELATED INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/657642
[patent_app_country] => US
[patent_app_date] => 2024-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7801
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657642
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/657642 | PWM SIGNAL GENERATOR CIRCUIT AND RELATED INTEGRATED CIRCUIT | May 6, 2024 | Pending |
Array
(
[id] => 19421516
[patent_doc_number] => 20240297640
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => PWM SIGNAL GENERATOR CIRCUIT AND RELATED INTEGRATED CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/657642
[patent_app_country] => US
[patent_app_date] => 2024-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7801
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657642
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/657642 | PWM SIGNAL GENERATOR CIRCUIT AND RELATED INTEGRATED CIRCUIT | May 6, 2024 | Pending |
Array
(
[id] => 19576080
[patent_doc_number] => 20240380372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => AMPLIFIER CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/655916
[patent_app_country] => US
[patent_app_date] => 2024-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11805
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18655916
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/655916 | AMPLIFIER CIRCUIT | May 5, 2024 | Pending |
Array
(
[id] => 19560751
[patent_doc_number] => 20240372543
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => MULTIPHASE N-CHANNEL HIGH-SIDE SWITCH FOR GaN INTEGRATED CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 18/653156
[patent_app_country] => US
[patent_app_date] => 2024-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2794
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653156
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/653156 | MULTIPHASE N-CHANNEL HIGH-SIDE SWITCH FOR GaN INTEGRATED CIRCUITS | May 1, 2024 | Pending |
Array
(
[id] => 19393576
[patent_doc_number] => 20240283446
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-22
[patent_title] => SWITCH DRIVE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/648928
[patent_app_country] => US
[patent_app_date] => 2024-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9264
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18648928
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/648928 | SWITCH DRIVE DEVICE | Apr 28, 2024 | Pending |
Array
(
[id] => 20456403
[patent_doc_number] => 12519466
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-06
[patent_title] => Dual voltage level bootstrap switch
[patent_app_type] => utility
[patent_app_number] => 18/647205
[patent_app_country] => US
[patent_app_date] => 2024-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 7084
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 252
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18647205
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/647205 | Dual voltage level bootstrap switch | Apr 25, 2024 | Issued |
Array
(
[id] => 20182860
[patent_doc_number] => 20250266818
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-21
[patent_title] => DRIVING SIGNAL-BASED REDUCTION OF GATE SWITCHING INSTABILITY FOR SEMICONDUCTOR POWER SWITCH
[patent_app_type] => utility
[patent_app_number] => 18/647102
[patent_app_country] => US
[patent_app_date] => 2024-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 916
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18647102
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/647102 | DRIVING SIGNAL-BASED REDUCTION OF GATE SWITCHING INSTABILITY FOR SEMICONDUCTOR POWER SWITCH | Apr 25, 2024 | Pending |
Array
(
[id] => 19421515
[patent_doc_number] => 20240297639
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-05
[patent_title] => LOW-POWER FLIP FLOP CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/646600
[patent_app_country] => US
[patent_app_date] => 2024-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6555
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646600
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/646600 | Low-power flip flop circuit | Apr 24, 2024 | Issued |
Array
(
[id] => 20312545
[patent_doc_number] => 20250330174
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-23
[patent_title] => DRIVER CIRCUIT AND METHOD FOR SUPPLYING LIMITED CURRENT TO A LOAD
[patent_app_type] => utility
[patent_app_number] => 18/644061
[patent_app_country] => US
[patent_app_date] => 2024-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2052
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644061
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/644061 | DRIVER CIRCUIT AND METHOD FOR SUPPLYING LIMITED CURRENT TO A LOAD | Apr 22, 2024 | Pending |
Array
(
[id] => 20284633
[patent_doc_number] => 20250309875
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => POWER-EFFICIENT CLOCK BUFFERS
[patent_app_type] => utility
[patent_app_number] => 18/618657
[patent_app_country] => US
[patent_app_date] => 2024-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8173
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618657
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/618657 | POWER-EFFICIENT CLOCK BUFFERS | Mar 26, 2024 | Pending |
Array
(
[id] => 20284633
[patent_doc_number] => 20250309875
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-02
[patent_title] => POWER-EFFICIENT CLOCK BUFFERS
[patent_app_type] => utility
[patent_app_number] => 18/618657
[patent_app_country] => US
[patent_app_date] => 2024-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8173
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618657
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/618657 | POWER-EFFICIENT CLOCK BUFFERS | Mar 26, 2024 | Pending |
Array
(
[id] => 19590732
[patent_doc_number] => 20240388289
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-21
[patent_title] => RF SWITCH STACK WITH CHARGE REDISTRIBUTION
[patent_app_type] => utility
[patent_app_number] => 18/615523
[patent_app_country] => US
[patent_app_date] => 2024-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10375
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615523
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/615523 | RF switch stack with charge redistribution | Mar 24, 2024 | Issued |
Array
(
[id] => 19468208
[patent_doc_number] => 20240321878
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => Reference Voltage Circuit
[patent_app_type] => utility
[patent_app_number] => 18/614096
[patent_app_country] => US
[patent_app_date] => 2024-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4668
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 370
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614096
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/614096 | Reference Voltage Circuit | Mar 21, 2024 | Pending |
Array
(
[id] => 19468208
[patent_doc_number] => 20240321878
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => Reference Voltage Circuit
[patent_app_type] => utility
[patent_app_number] => 18/614096
[patent_app_country] => US
[patent_app_date] => 2024-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4668
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 370
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18614096
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/614096 | Reference Voltage Circuit | Mar 21, 2024 | Pending |
Array
(
[id] => 20251749
[patent_doc_number] => 20250300618
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-25
[patent_title] => OFFSET VOLTAGE CANCELATION FOR A CHARGE AMPLIFICATION CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/611889
[patent_app_country] => US
[patent_app_date] => 2024-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1228
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 357
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18611889
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/611889 | OFFSET VOLTAGE CANCELATION FOR A CHARGE AMPLIFICATION CIRCUIT | Mar 20, 2024 | Pending |
Array
(
[id] => 20236364
[patent_doc_number] => 20250293683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-18
[patent_title] => FILTER WITH LOW LEAKAGE POWER-DOWN SWITCHES
[patent_app_type] => utility
[patent_app_number] => 18/606645
[patent_app_country] => US
[patent_app_date] => 2024-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18606645
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/606645 | FILTER WITH LOW LEAKAGE POWER-DOWN SWITCHES | Mar 14, 2024 | Pending |