
Dmitriy Yemelyanov
Examiner (ID: 19439, Phone: (571)270-7920 , Office: P/2891 )
| Most Active Art Unit | 2891 |
| Art Unit(s) | 2891 |
| Total Applications | 685 |
| Issued Applications | 443 |
| Pending Applications | 98 |
| Abandoned Applications | 153 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20566089
[patent_doc_number] => 12568716
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-03-03
[patent_title] => Wafer-scale separation and transfer of GaN material
[patent_app_type] => utility
[patent_app_number] => 18/913184
[patent_app_country] => US
[patent_app_date] => 2024-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 26
[patent_no_of_words] => 9396
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18913184
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/913184 | Wafer-scale separation and transfer of GaN material | Oct 10, 2024 | Issued |
Array
(
[id] => 19604929
[patent_doc_number] => 20240395809
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-28
[patent_title] => SEMICONDUCTOR DEVICE STRUCTURE WITH HYBRID FINS
[patent_app_type] => utility
[patent_app_number] => 18/789172
[patent_app_country] => US
[patent_app_date] => 2024-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15143
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789172
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/789172 | SEMICONDUCTOR DEVICE STRUCTURE WITH HYBRID FINS | Jul 29, 2024 | Pending |
Array
(
[id] => 19688077
[patent_doc_number] => 20250006622
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-02
[patent_title] => SEMICONDUCTOR MODULE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/644494
[patent_app_country] => US
[patent_app_date] => 2024-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9618
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18644494
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/644494 | SEMICONDUCTOR MODULE AND MANUFACTURING METHOD THEREOF | Apr 23, 2024 | Pending |
Array
(
[id] => 20311998
[patent_doc_number] => 20250329627
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-10-23
[patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHODS OF MANUFACTURE
[patent_app_type] => utility
[patent_app_number] => 18/638568
[patent_app_country] => US
[patent_app_date] => 2024-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1021
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18638568
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/638568 | SEMICONDUCTOR DEVICE PACKAGE AND METHODS OF MANUFACTURE | Apr 16, 2024 | Pending |
Array
(
[id] => 19788581
[patent_doc_number] => 20250062260
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-02-20
[patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD FOR THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/608838
[patent_app_country] => US
[patent_app_date] => 2024-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5336
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 59
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18608838
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/608838 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD FOR THE SAME | Mar 17, 2024 | Pending |
Array
(
[id] => 20139506
[patent_doc_number] => 20250246550
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-31
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/600793
[patent_app_country] => US
[patent_app_date] => 2024-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600793
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/600793 | SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME | Mar 10, 2024 | Pending |
Array
(
[id] => 19852856
[patent_doc_number] => 20250098207
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-20
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/591169
[patent_app_country] => US
[patent_app_date] => 2024-02-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8990
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 198
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591169
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/591169 | SEMICONDUCTOR DEVICE | Feb 28, 2024 | Pending |
Array
(
[id] => 19634564
[patent_doc_number] => 20240413013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-12
[patent_title] => MANUFACTURING METHOD FOR ELEMENT CHIP AND MANUFACTURING METHOD FOR BONDED BODY
[patent_app_type] => utility
[patent_app_number] => 18/588505
[patent_app_country] => US
[patent_app_date] => 2024-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7817
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18588505
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/588505 | MANUFACTURING METHOD FOR ELEMENT CHIP AND MANUFACTURING METHOD FOR BONDED BODY | Feb 26, 2024 | Pending |
Array
(
[id] => 19237636
[patent_doc_number] => 20240194831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/443613
[patent_app_country] => US
[patent_app_date] => 2024-02-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14150
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443613
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/443613 | Display device and method of manufacturing the same | Feb 15, 2024 | Issued |
Array
(
[id] => 20155102
[patent_doc_number] => 20250254940
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-07
[patent_title] => SEMICONDUCTOR STRUCTURE WITH BLOCKING FEATURES FORMED WITHIN BASE EPITAXY LAYERS AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/435685
[patent_app_country] => US
[patent_app_date] => 2024-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4612
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18435685
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/435685 | SEMICONDUCTOR STRUCTURE WITH BLOCKING FEATURES FORMED WITHIN BASE EPITAXY LAYERS AND METHOD FOR MANUFACTURING THE SAME | Feb 6, 2024 | Pending |
Array
(
[id] => 20049683
[patent_doc_number] => 20250187905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-12
[patent_title] => MICRO-ELECTROMECHANICAL SYSTEM (MEMS) MIRROR COMB DRIVE
[patent_app_type] => utility
[patent_app_number] => 18/431726
[patent_app_country] => US
[patent_app_date] => 2024-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18431726
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/431726 | MICRO-ELECTROMECHANICAL SYSTEM (MEMS) MIRROR COMB DRIVE | Feb 1, 2024 | Pending |
Array
(
[id] => 19158980
[patent_doc_number] => 20240151687
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => SOLUTION DETECTION CIRCUIT AND APPARATUS, DRIVING METHOD AND SOLUTION DETECTION METHOD
[patent_app_type] => utility
[patent_app_number] => 18/413242
[patent_app_country] => US
[patent_app_date] => 2024-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8508
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 266
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413242
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/413242 | SOLUTION DETECTION CIRCUIT AND APPARATUS, DRIVING METHOD AND SOLUTION DETECTION METHOD | Jan 15, 2024 | Pending |
Array
(
[id] => 19502135
[patent_doc_number] => 20240341153
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-10
[patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/412691
[patent_app_country] => US
[patent_app_date] => 2024-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13938
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18412691
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/412691 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | Jan 14, 2024 | Pending |
Array
(
[id] => 19321427
[patent_doc_number] => 20240242974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-18
[patent_title] => DEVICES, SYSTEMS AND METHODS FOR REDUCING WARPAGE DURING FABRICATION OF DUAL SIDE MOLD MODULES
[patent_app_type] => utility
[patent_app_number] => 18/412390
[patent_app_country] => US
[patent_app_date] => 2024-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6984
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18412390
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/412390 | DEVICES, SYSTEMS AND METHODS FOR REDUCING WARPAGE DURING FABRICATION OF DUAL SIDE MOLD MODULES | Jan 11, 2024 | Pending |
Array
(
[id] => 19548597
[patent_doc_number] => 20240365633
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-31
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/409811
[patent_app_country] => US
[patent_app_date] => 2024-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16428
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409811
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/409811 | DISPLAY DEVICE | Jan 10, 2024 | Pending |
Array
(
[id] => 20063576
[patent_doc_number] => 20250201798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-19
[patent_title] => PACKAGE STRUCTURE, DIE STRUCTURE AND METHOD FOR FORMING THE PACKAGE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/401853
[patent_app_country] => US
[patent_app_date] => 2024-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4608
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18401853
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/401853 | PACKAGE STRUCTURE, DIE STRUCTURE AND METHOD FOR FORMING THE PACKAGE STRUCTURE | Jan 1, 2024 | Pending |
Array
(
[id] => 19288114
[patent_doc_number] => 20240224597
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/400339
[patent_app_country] => US
[patent_app_date] => 2023-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10702
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18400339
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/400339 | DISPLAY APPARATUS | Dec 28, 2023 | Pending |
Array
(
[id] => 20088994
[patent_doc_number] => 20250218930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-03
[patent_title] => CROSS-COUPLE CONSTRUCT WITH SHIFTED GATE CONTACT
[patent_app_type] => utility
[patent_app_number] => 18/398848
[patent_app_country] => US
[patent_app_date] => 2023-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398848
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/398848 | CROSS-COUPLE CONSTRUCT WITH SHIFTED GATE CONTACT | Dec 27, 2023 | Pending |
Array
(
[id] => 20091167
[patent_doc_number] => 20250221103
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-03
[patent_title] => Transparent Conductive Oxide Layer With Ohmic Contact On n-type AlInGaP for LEDs and MicroLEDs
[patent_app_type] => utility
[patent_app_number] => 18/397522
[patent_app_country] => US
[patent_app_date] => 2023-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1119
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397522
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/397522 | Transparent Conductive Oxide Layer With Ohmic Contact On n-type AlInGaP for LEDs and MicroLEDs | Dec 26, 2023 | Pending |
Array
(
[id] => 20074314
[patent_doc_number] => 20250212536
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-26
[patent_title] => IMAGE SENSOR WITH LIGHT BALANCING STRUCTURE AND METHODS THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/391236
[patent_app_country] => US
[patent_app_date] => 2023-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7923
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18391236
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/391236 | IMAGE SENSOR WITH LIGHT BALANCING STRUCTURE AND METHODS THEREOF | Dec 19, 2023 | Pending |