Search

Do H. Yoo

Examiner (ID: 7566)

Most Active Art Unit
2511
Art Unit(s)
2824, 2818, 2502, 2511
Total Applications
794
Issued Applications
686
Pending Applications
18
Abandoned Applications
90

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3698038 [patent_doc_number] => 05691944 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/636149 [patent_app_country] => US [patent_app_date] => 1996-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5496 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/691/05691944.pdf [firstpage_image] =>[orig_patent_app_number] => 636149 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/636149
Non-volatile semiconductor memory device Apr 21, 1996 Issued
Array ( [id] => 3873422 [patent_doc_number] => 05796667 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Bit map addressing schemes for flash memory' [patent_app_type] => 1 [patent_app_number] => 8/639240 [patent_app_country] => US [patent_app_date] => 1996-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6874 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/796/05796667.pdf [firstpage_image] =>[orig_patent_app_number] => 639240 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/639240
Bit map addressing schemes for flash memory Apr 18, 1996 Issued
Array ( [id] => 3845611 [patent_doc_number] => 05815443 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Bit map addressing schemes for flash memory' [patent_app_type] => 1 [patent_app_number] => 8/634953 [patent_app_country] => US [patent_app_date] => 1996-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6877 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815443.pdf [firstpage_image] =>[orig_patent_app_number] => 634953 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/634953
Bit map addressing schemes for flash memory Apr 18, 1996 Issued
Array ( [id] => 3657097 [patent_doc_number] => 05629893 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'System for constant field erasure in a flash EPROM' [patent_app_type] => 1 [patent_app_number] => 8/634512 [patent_app_country] => US [patent_app_date] => 1996-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2134 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629893.pdf [firstpage_image] =>[orig_patent_app_number] => 634512 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/634512
System for constant field erasure in a flash EPROM Apr 17, 1996 Issued
Array ( [id] => 3715912 [patent_doc_number] => 05654925 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Circuit for applying a stress voltage in sequence to selected memory blocks in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/634643 [patent_app_country] => US [patent_app_date] => 1996-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3282 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/654/05654925.pdf [firstpage_image] =>[orig_patent_app_number] => 634643 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/634643
Circuit for applying a stress voltage in sequence to selected memory blocks in a semiconductor device Apr 17, 1996 Issued
Array ( [id] => 3741196 [patent_doc_number] => 05636163 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'Random access memory with a plurality amplifier groups for reading and writing in normal and test modes' [patent_app_type] => 1 [patent_app_number] => 8/632967 [patent_app_country] => US [patent_app_date] => 1996-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2988 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 269 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/636/05636163.pdf [firstpage_image] =>[orig_patent_app_number] => 632967 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632967
Random access memory with a plurality amplifier groups for reading and writing in normal and test modes Apr 15, 1996 Issued
Array ( [id] => 3636577 [patent_doc_number] => 05621693 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-15 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/632147 [patent_app_country] => US [patent_app_date] => 1996-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6658 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 593 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/621/05621693.pdf [firstpage_image] =>[orig_patent_app_number] => 632147 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/632147
Semiconductor memory device Apr 14, 1996 Issued
Array ( [id] => 3792001 [patent_doc_number] => 05818756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Non-volatile semiconductor memory device with block erase function' [patent_app_type] => 1 [patent_app_number] => 8/631049 [patent_app_country] => US [patent_app_date] => 1996-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 8115 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818756.pdf [firstpage_image] =>[orig_patent_app_number] => 631049 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/631049
Non-volatile semiconductor memory device with block erase function Apr 11, 1996 Issued
Array ( [id] => 3704624 [patent_doc_number] => 05596533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Method and apparatus for reading/writing data from/into semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/626549 [patent_app_country] => US [patent_app_date] => 1996-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3834 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596533.pdf [firstpage_image] =>[orig_patent_app_number] => 626549 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/626549
Method and apparatus for reading/writing data from/into semiconductor memory device Apr 1, 1996 Issued
Array ( [id] => 3792369 [patent_doc_number] => 05818779 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Board having a plurality of integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/610046 [patent_app_country] => US [patent_app_date] => 1996-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1231 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818779.pdf [firstpage_image] =>[orig_patent_app_number] => 610046 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/610046
Board having a plurality of integrated circuits Mar 3, 1996 Issued
Array ( [id] => 3738548 [patent_doc_number] => 05671184 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-23 [patent_title] => 'Semiconductor memory with cells combined into individually addressable units, and method for operating such memories' [patent_app_type] => 1 [patent_app_number] => 8/610047 [patent_app_country] => US [patent_app_date] => 1996-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3954 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/671/05671184.pdf [firstpage_image] =>[orig_patent_app_number] => 610047 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/610047
Semiconductor memory with cells combined into individually addressable units, and method for operating such memories Mar 3, 1996 Issued
Array ( [id] => 3858372 [patent_doc_number] => 05719811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-17 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/600847 [patent_app_country] => US [patent_app_date] => 1996-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7127 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/719/05719811.pdf [firstpage_image] =>[orig_patent_app_number] => 600847 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/600847
Semiconductor memory device Feb 12, 1996 Issued
Array ( [id] => 3635034 [patent_doc_number] => 05608669 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Fast internal reference cell trimming for flash EEPROM memory' [patent_app_type] => 1 [patent_app_number] => 8/599123 [patent_app_country] => US [patent_app_date] => 1996-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5341 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608669.pdf [firstpage_image] =>[orig_patent_app_number] => 599123 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/599123
Fast internal reference cell trimming for flash EEPROM memory Feb 8, 1996 Issued
Array ( [id] => 3669980 [patent_doc_number] => 05648934 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-15 [patent_title] => 'On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same' [patent_app_type] => 1 [patent_app_number] => 8/596528 [patent_app_country] => US [patent_app_date] => 1996-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5161 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/648/05648934.pdf [firstpage_image] =>[orig_patent_app_number] => 596528 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/596528
On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same Feb 4, 1996 Issued
Array ( [id] => 3635237 [patent_doc_number] => 05608679 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Fast internal reference cell trimming for flash EEPROM memory' [patent_app_type] => 1 [patent_app_number] => 8/594415 [patent_app_country] => US [patent_app_date] => 1996-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5341 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608679.pdf [firstpage_image] =>[orig_patent_app_number] => 594415 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/594415
Fast internal reference cell trimming for flash EEPROM memory Jan 30, 1996 Issued
08/587749 SEMICONDUCTOR MEMORY DEVICE Jan 16, 1996 Abandoned
Array ( [id] => 3739039 [patent_doc_number] => 05703811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-30 [patent_title] => 'Data output buffer circuit of semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/580546 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5325 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/703/05703811.pdf [firstpage_image] =>[orig_patent_app_number] => 580546 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/580546
Data output buffer circuit of semiconductor memory device Dec 28, 1995 Issued
Array ( [id] => 3666644 [patent_doc_number] => 05659496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'System and method for programming VPROM links' [patent_app_type] => 1 [patent_app_number] => 8/581646 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1515 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659496.pdf [firstpage_image] =>[orig_patent_app_number] => 581646 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581646
System and method for programming VPROM links Dec 27, 1995 Issued
Array ( [id] => 3705346 [patent_doc_number] => 05619468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Two-stage memory refresh circuit' [patent_app_type] => 1 [patent_app_number] => 8/568848 [patent_app_country] => US [patent_app_date] => 1995-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3218 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619468.pdf [firstpage_image] =>[orig_patent_app_number] => 568848 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/568848
Two-stage memory refresh circuit Dec 6, 1995 Issued
Array ( [id] => 3629666 [patent_doc_number] => 05642318 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'Testing method for FIFOS' [patent_app_type] => 1 [patent_app_number] => 8/567544 [patent_app_country] => US [patent_app_date] => 1995-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3367 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/642/05642318.pdf [firstpage_image] =>[orig_patent_app_number] => 567544 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/567544
Testing method for FIFOS Dec 4, 1995 Issued
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