
Do H. Yoo
Examiner (ID: 949)
| Most Active Art Unit | 2511 |
| Art Unit(s) | 2818, 2824, 2511, 2502 |
| Total Applications | 794 |
| Issued Applications | 686 |
| Pending Applications | 18 |
| Abandoned Applications | 90 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 08/423556 | BIT MAP ADDRESSING SCHEMES FOR FLASH MEMORY | Apr 16, 1995 | Abandoned |
Array
(
[id] => 3672447
[patent_doc_number] => 05625594
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-29
[patent_title] => 'Digital video memory'
[patent_app_type] => 1
[patent_app_number] => 8/420544
[patent_app_country] => US
[patent_app_date] => 1995-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 5270
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[patent_maintenance] => 1
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[pdf_file] => patents/05/625/05625594.pdf
[firstpage_image] =>[orig_patent_app_number] => 420544
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/420544 | Digital video memory | Apr 11, 1995 | Issued |
Array
(
[id] => 3668108
[patent_doc_number] => 05627793
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-06
[patent_title] => 'Clock generation circuit having compensation for semiconductor manufacturing process variations'
[patent_app_type] => 1
[patent_app_number] => 8/413789
[patent_app_country] => US
[patent_app_date] => 1995-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 4633
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[pdf_file] => patents/05/627/05627793.pdf
[firstpage_image] =>[orig_patent_app_number] => 413789
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/413789 | Clock generation circuit having compensation for semiconductor manufacturing process variations | Mar 29, 1995 | Issued |
Array
(
[id] => 3775052
[patent_doc_number] => 05844851
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Anti-noise and auto-stand-by memory architecture'
[patent_app_type] => 1
[patent_app_number] => 8/412553
[patent_app_country] => US
[patent_app_date] => 1995-03-29
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[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/844/05844851.pdf
[firstpage_image] =>[orig_patent_app_number] => 412553
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/412553 | Anti-noise and auto-stand-by memory architecture | Mar 28, 1995 | Issued |
Array
(
[id] => 3873665
[patent_doc_number] => 05793674
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-08-11
[patent_title] => 'Semiconductor integrated circuit device, manufacturing method thereof, and driving method for the same'
[patent_app_type] => 1
[patent_app_number] => 8/409041
[patent_app_country] => US
[patent_app_date] => 1995-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 6615
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[pdf_file] => patents/05/793/05793674.pdf
[firstpage_image] =>[orig_patent_app_number] => 409041
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/409041 | Semiconductor integrated circuit device, manufacturing method thereof, and driving method for the same | Mar 21, 1995 | Issued |
Array
(
[id] => 3706852
[patent_doc_number] => 05677880
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Semiconductor memory having redundancy circuit'
[patent_app_type] => 1
[patent_app_number] => 8/407850
[patent_app_country] => US
[patent_app_date] => 1995-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] => patents/05/677/05677880.pdf
[firstpage_image] =>[orig_patent_app_number] => 407850
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/407850 | Semiconductor memory having redundancy circuit | Mar 20, 1995 | Issued |
Array
(
[id] => 3590304
[patent_doc_number] => 05499211
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-12
[patent_title] => 'Bit-line precharge current limiter for CMOS dynamic memories'
[patent_app_type] => 1
[patent_app_number] => 8/402442
[patent_app_country] => US
[patent_app_date] => 1995-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 1325
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/499/05499211.pdf
[firstpage_image] =>[orig_patent_app_number] => 402442
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/402442 | Bit-line precharge current limiter for CMOS dynamic memories | Mar 12, 1995 | Issued |
Array
(
[id] => 3623522
[patent_doc_number] => 05535172
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Dual-port random access memory having reduced architecture'
[patent_app_type] => 1
[patent_app_number] => 8/395443
[patent_app_country] => US
[patent_app_date] => 1995-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 5388
[patent_no_of_claims] => 16
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[pdf_file] => patents/05/535/05535172.pdf
[firstpage_image] =>[orig_patent_app_number] => 395443
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/395443 | Dual-port random access memory having reduced architecture | Feb 27, 1995 | Issued |
Array
(
[id] => 3520827
[patent_doc_number] => 05563823
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-08
[patent_title] => 'Fast FLASH EPROM programming and pre-programming circuit design'
[patent_app_type] => 1
[patent_app_number] => 8/393243
[patent_app_country] => US
[patent_app_date] => 1995-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 6593
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/563/05563823.pdf
[firstpage_image] =>[orig_patent_app_number] => 393243
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/393243 | Fast FLASH EPROM programming and pre-programming circuit design | Feb 22, 1995 | Issued |
Array
(
[id] => 3507705
[patent_doc_number] => 05532968
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-02
[patent_title] => 'Self refresh control circuit for memory cell array'
[patent_app_type] => 1
[patent_app_number] => 8/392444
[patent_app_country] => US
[patent_app_date] => 1995-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5122
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[pdf_file] => patents/05/532/05532968.pdf
[firstpage_image] =>[orig_patent_app_number] => 392444
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/392444 | Self refresh control circuit for memory cell array | Feb 21, 1995 | Issued |
| 08/391146 | LOAD SIGNAL GENERATING METHOD AND CIRCUIT FOR NONVOLATILE MEMORIES | Feb 20, 1995 | Abandoned |
Array
(
[id] => 3586900
[patent_doc_number] => 05524092
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-04
[patent_title] => 'Multilayered ferroelectric-semiconductor memory-device'
[patent_app_type] => 1
[patent_app_number] => 8/391239
[patent_app_country] => US
[patent_app_date] => 1995-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2409
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[pdf_file] => patents/05/524/05524092.pdf
[firstpage_image] =>[orig_patent_app_number] => 391239
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/391239 | Multilayered ferroelectric-semiconductor memory-device | Feb 16, 1995 | Issued |
Array
(
[id] => 3566154
[patent_doc_number] => 05544115
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-06
[patent_title] => 'Semiconductor memory device allowing selection of the number of sense amplifiers to be activated simultaneously'
[patent_app_type] => 1
[patent_app_number] => 8/390261
[patent_app_country] => US
[patent_app_date] => 1995-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[pdf_file] => patents/05/544/05544115.pdf
[firstpage_image] =>[orig_patent_app_number] => 390261
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/390261 | Semiconductor memory device allowing selection of the number of sense amplifiers to be activated simultaneously | Feb 14, 1995 | Issued |
Array
(
[id] => 3632968
[patent_doc_number] => 05594691
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-14
[patent_title] => 'Address transition detection sensing interface for flash memory having multi-bit cells'
[patent_app_type] => 1
[patent_app_number] => 8/389043
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[patent_app_date] => 1995-02-15
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/594/05594691.pdf
[firstpage_image] =>[orig_patent_app_number] => 389043
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/389043 | Address transition detection sensing interface for flash memory having multi-bit cells | Feb 14, 1995 | Issued |
Array
(
[id] => 3572873
[patent_doc_number] => 05526310
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-11
[patent_title] => 'Memory with latched output'
[patent_app_type] => 1
[patent_app_number] => 8/389429
[patent_app_country] => US
[patent_app_date] => 1995-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[patent_no_of_words] => 3558
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[pdf_file] => patents/05/526/05526310.pdf
[firstpage_image] =>[orig_patent_app_number] => 389429
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/389429 | Memory with latched output | Feb 13, 1995 | Issued |
Array
(
[id] => 3523478
[patent_doc_number] => 05513144
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-30
[patent_title] => 'On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same'
[patent_app_type] => 1
[patent_app_number] => 8/387244
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[patent_app_date] => 1995-02-13
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[pdf_file] => patents/05/513/05513144.pdf
[firstpage_image] =>[orig_patent_app_number] => 387244
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/387244 | On-chip memory redundancy circuitry for programmable non-volatile memories, and methods for programming same | Feb 12, 1995 | Issued |
Array
(
[id] => 3598915
[patent_doc_number] => 05517470
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-14
[patent_title] => 'Nonvolatile control architecture'
[patent_app_type] => 1
[patent_app_number] => 8/388042
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[patent_app_date] => 1995-02-10
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[pdf_file] => patents/05/517/05517470.pdf
[firstpage_image] =>[orig_patent_app_number] => 388042
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/388042 | Nonvolatile control architecture | Feb 9, 1995 | Issued |
Array
(
[id] => 3704576
[patent_doc_number] => 05596530
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'Flash EPROM with block erase flags for over-erase protection'
[patent_app_type] => 1
[patent_app_number] => 8/383726
[patent_app_country] => US
[patent_app_date] => 1995-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/596/05596530.pdf
[firstpage_image] =>[orig_patent_app_number] => 383726
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/383726 | Flash EPROM with block erase flags for over-erase protection | Feb 1, 1995 | Issued |
| 08/377141 | FAST ACCESS MULTI-BIT RADOM ACCESS MEMORY | Jan 22, 1995 | Abandoned |
Array
(
[id] => 3741973
[patent_doc_number] => 05694361
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-02
[patent_title] => 'Output circuit'
[patent_app_type] => 1
[patent_app_number] => 8/376089
[patent_app_country] => US
[patent_app_date] => 1995-01-20
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/694/05694361.pdf
[firstpage_image] =>[orig_patent_app_number] => 376089
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/376089 | Output circuit | Jan 19, 1995 | Issued |