Search

Dominic E. Rego

Examiner (ID: 392, Phone: (571)272-8132 , Office: P/2647 )

Most Active Art Unit
2647
Art Unit(s)
2648, 2618, 2647, 2684
Total Applications
1492
Issued Applications
1279
Pending Applications
77
Abandoned Applications
158

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8489743 [patent_doc_number] => 20120289150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'DATA TRANSMISSION SYSTEM FOR FORWARDING DATA USING A PLURALITY OF ANTENNAS' [patent_app_type] => utility [patent_app_number] => 13/556895 [patent_app_country] => US [patent_app_date] => 2012-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9186 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13556895 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/556895
Data transmission system for forwarding data using a plurality of antennas Jul 23, 2012 Issued
Array ( [id] => 8393888 [patent_doc_number] => 20120231724 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'FILTERING CIRCUIT WITH JAMMER GENERATOR' [patent_app_type] => utility [patent_app_number] => 13/477552 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9955 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477552 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477552
Filtering circuit with jammer generator May 21, 2012 Issued
Array ( [id] => 8262387 [patent_doc_number] => 20120161815 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'METHOD AND APPARATUS FOR TIME-DIFFERENTIAL COMPARISON OF AN ANALOG SIGNAL' [patent_app_type] => utility [patent_app_number] => 13/409959 [patent_app_country] => US [patent_app_date] => 2012-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3206 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13409959 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/409959
Method and apparatus for time-differential comparison of an analog signal Feb 29, 2012 Issued
Array ( [id] => 8714066 [patent_doc_number] => 08400208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'High-voltage switch using three FETs' [patent_app_type] => utility [patent_app_number] => 13/326162 [patent_app_country] => US [patent_app_date] => 2011-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 8208 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13326162 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/326162
High-voltage switch using three FETs Dec 13, 2011 Issued
Array ( [id] => 8507129 [patent_doc_number] => 20120306537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'ULTRA-LOW VOLTAGE LEVEL SHIFTING CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/308035 [patent_app_country] => US [patent_app_date] => 2011-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4313 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13308035 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/308035
Ultra-low voltage level shifting circuit Nov 29, 2011 Issued
Array ( [id] => 7788368 [patent_doc_number] => 20120049924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-01 [patent_title] => 'LEVEL SHIFTER AND RELATED APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/207055 [patent_app_country] => US [patent_app_date] => 2011-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4853 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20120049924.pdf [firstpage_image] =>[orig_patent_app_number] => 13207055 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/207055
Level shifter and related apparatus Aug 9, 2011 Issued
Array ( [id] => 8653710 [patent_doc_number] => 08373461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'PLL frequency synthesizer' [patent_app_type] => utility [patent_app_number] => 13/104851 [patent_app_country] => US [patent_app_date] => 2011-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4208 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13104851 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/104851
PLL frequency synthesizer May 9, 2011 Issued
Array ( [id] => 6171177 [patent_doc_number] => 20110175668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'Cascode Switching Circuit' [patent_app_type] => utility [patent_app_number] => 13/078616 [patent_app_country] => US [patent_app_date] => 2011-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3708 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20110175668.pdf [firstpage_image] =>[orig_patent_app_number] => 13078616 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/078616
Cascode switching circuit Mar 31, 2011 Issued
Array ( [id] => 8258277 [patent_doc_number] => 08207782 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-06-26 [patent_title] => 'Circuits and methods to minimize thermally generated offset voltages' [patent_app_type] => utility [patent_app_number] => 13/038202 [patent_app_country] => US [patent_app_date] => 2011-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3887 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13038202 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/038202
Circuits and methods to minimize thermally generated offset voltages Feb 28, 2011 Issued
Array ( [id] => 8470639 [patent_doc_number] => 08299821 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-30 [patent_title] => 'Integrated gate driver circuit' [patent_app_type] => utility [patent_app_number] => 12/781967 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5154 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12781967 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/781967
Integrated gate driver circuit May 17, 2010 Issued
Array ( [id] => 8245452 [patent_doc_number] => 08203377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-06-19 [patent_title] => 'Gate driver for enhancement-mode and depletion-mode wide bandgap semiconductor JFETs' [patent_app_type] => utility [patent_app_number] => 12/777961 [patent_app_country] => US [patent_app_date] => 2010-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 32 [patent_no_of_words] => 7419 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/203/08203377.pdf [firstpage_image] =>[orig_patent_app_number] => 12777961 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/777961
Gate driver for enhancement-mode and depletion-mode wide bandgap semiconductor JFETs May 10, 2010 Issued
Array ( [id] => 8083405 [patent_doc_number] => 08149025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-03 [patent_title] => 'Gate driving circuit' [patent_app_type] => utility [patent_app_number] => 12/774134 [patent_app_country] => US [patent_app_date] => 2010-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3565 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/149/08149025.pdf [firstpage_image] =>[orig_patent_app_number] => 12774134 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/774134
Gate driving circuit May 4, 2010 Issued
Array ( [id] => 6331135 [patent_doc_number] => 20100327951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/662712 [patent_app_country] => US [patent_app_date] => 2010-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4393 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327951.pdf [firstpage_image] =>[orig_patent_app_number] => 12662712 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/662712
Semiconductor integrated circuit Apr 28, 2010 Abandoned
Array ( [id] => 8702209 [patent_doc_number] => 08395433 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Input-output device protection' [patent_app_type] => utility [patent_app_number] => 12/662500 [patent_app_country] => US [patent_app_date] => 2010-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6425 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12662500 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/662500
Input-output device protection Apr 19, 2010 Issued
Array ( [id] => 6324443 [patent_doc_number] => 20100244909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'LOW-SPEED DRIVER CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/732716 [patent_app_country] => US [patent_app_date] => 2010-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6966 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244909.pdf [firstpage_image] =>[orig_patent_app_number] => 12732716 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/732716
Low-speed driver circuit Mar 25, 2010 Issued
Array ( [id] => 8556054 [patent_doc_number] => 08330529 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-12-11 [patent_title] => 'Voltage regulator' [patent_app_type] => utility [patent_app_number] => 12/696010 [patent_app_country] => US [patent_app_date] => 2010-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3842 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12696010 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/696010
Voltage regulator Jan 27, 2010 Issued
Array ( [id] => 6475295 [patent_doc_number] => 20100207684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'CMOS CHARGE PUMP WITH IMPROVED LATCH-UP IMMUNITY' [patent_app_type] => utility [patent_app_number] => 12/691937 [patent_app_country] => US [patent_app_date] => 2010-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7274 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20100207684.pdf [firstpage_image] =>[orig_patent_app_number] => 12691937 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/691937
CMOS charge pump with improved latch-up immunity Jan 21, 2010 Issued
Array ( [id] => 8116115 [patent_doc_number] => 08159280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Noise generator' [patent_app_type] => utility [patent_app_number] => 12/685149 [patent_app_country] => US [patent_app_date] => 2010-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3408 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/159/08159280.pdf [firstpage_image] =>[orig_patent_app_number] => 12685149 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/685149
Noise generator Jan 10, 2010 Issued
Array ( [id] => 7998351 [patent_doc_number] => 08081023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-20 [patent_title] => 'Phase shift circuit with lower intrinsic delay' [patent_app_type] => utility [patent_app_number] => 12/625274 [patent_app_country] => US [patent_app_date] => 2009-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6741 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/081/08081023.pdf [firstpage_image] =>[orig_patent_app_number] => 12625274 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/625274
Phase shift circuit with lower intrinsic delay Nov 23, 2009 Issued
Array ( [id] => 8550067 [patent_doc_number] => 08324953 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-12-04 [patent_title] => 'Method and a system for signal processing' [patent_app_type] => utility [patent_app_number] => 12/582744 [patent_app_country] => US [patent_app_date] => 2009-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6184 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12582744 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/582744
Method and a system for signal processing Oct 20, 2009 Issued
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