| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2716679
[patent_doc_number] => 05062042
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-29
[patent_title] => 'System for managing data which is accessible by file address or disk address via a disk track map'
[patent_app_type] => 1
[patent_app_number] => 7/497468
[patent_app_country] => US
[patent_app_date] => 1990-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 31
[patent_no_of_words] => 18980
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/062/05062042.pdf
[firstpage_image] =>[orig_patent_app_number] => 497468
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/497468 | System for managing data which is accessible by file address or disk address via a disk track map | Mar 21, 1990 | Issued |
Array
(
[id] => 2988348
[patent_doc_number] => 05226126
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-06
[patent_title] => 'Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags'
[patent_app_type] => 1
[patent_app_number] => 7/483223
[patent_app_country] => US
[patent_app_date] => 1990-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 22807
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 376
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/226/05226126.pdf
[firstpage_image] =>[orig_patent_app_number] => 483223
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/483223 | Processor having plurality of functional units for orderly retiring outstanding operations based upon its associated tags | Feb 20, 1990 | Issued |
Array
(
[id] => 2961943
[patent_doc_number] => 05222243
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-22
[patent_title] => 'Sorting apparatus having plurality of registers with associated multiplexers and comparators for concurrently sorting and storing incoming data according to magnitude'
[patent_app_type] => 1
[patent_app_number] => 7/478126
[patent_app_country] => US
[patent_app_date] => 1990-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 3839
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 361
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/222/05222243.pdf
[firstpage_image] =>[orig_patent_app_number] => 478126
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/478126 | Sorting apparatus having plurality of registers with associated multiplexers and comparators for concurrently sorting and storing incoming data according to magnitude | Feb 8, 1990 | Issued |
Array
(
[id] => 2758717
[patent_doc_number] => 05021947
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-04
[patent_title] => 'Data-flow multiprocessor architecture with three dimensional multistage interconnection network for efficient signal and data processing'
[patent_app_type] => 1
[patent_app_number] => 7/474707
[patent_app_country] => US
[patent_app_date] => 1990-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 22
[patent_no_of_words] => 10726
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/021/05021947.pdf
[firstpage_image] =>[orig_patent_app_number] => 474707
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/474707 | Data-flow multiprocessor architecture with three dimensional multistage interconnection network for efficient signal and data processing | Jan 29, 1990 | Issued |
Array
(
[id] => 2867691
[patent_doc_number] => 05113517
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-12
[patent_title] => 'Concurrent display of data from two different processors each having different display font and user interface for controlling transfer of converted font data therebetween'
[patent_app_type] => 1
[patent_app_number] => 7/469722
[patent_app_country] => US
[patent_app_date] => 1990-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 47
[patent_figures_cnt] => 47
[patent_no_of_words] => 33994
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/113/05113517.pdf
[firstpage_image] =>[orig_patent_app_number] => 469722
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/469722 | Concurrent display of data from two different processors each having different display font and user interface for controlling transfer of converted font data therebetween | Jan 23, 1990 | Issued |
Array
(
[id] => 2947071
[patent_doc_number] => 05220674
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-06-15
[patent_title] => 'Local area print server for requesting and storing required resource data and forwarding printer status message to selected destination'
[patent_app_type] => 1
[patent_app_number] => 7/467327
[patent_app_country] => US
[patent_app_date] => 1990-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 18883
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/220/05220674.pdf
[firstpage_image] =>[orig_patent_app_number] => 467327
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/467327 | Local area print server for requesting and storing required resource data and forwarding printer status message to selected destination | Jan 17, 1990 | Issued |
Array
(
[id] => 2718874
[patent_doc_number] => 05042004
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-20
[patent_title] => 'Programmable logic device with subroutine stack and random access memory'
[patent_app_type] => 1
[patent_app_number] => 7/464560
[patent_app_country] => US
[patent_app_date] => 1990-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5069
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/042/05042004.pdf
[firstpage_image] =>[orig_patent_app_number] => 464560
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/464560 | Programmable logic device with subroutine stack and random access memory | Jan 15, 1990 | Issued |
| 07/469755 | SELECTIVE PROTECTION OF INPUT/OUTPUT PORT FROM ACCESS | Jan 2, 1990 | Abandoned |
Array
(
[id] => 2888964
[patent_doc_number] => 05119327
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-02
[patent_title] => 'Text comparator with counters for indicating positions of correctly decoding text elements within an ordered sequence of text elements'
[patent_app_type] => 1
[patent_app_number] => 7/460205
[patent_app_country] => US
[patent_app_date] => 1990-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 38
[patent_no_of_words] => 23550
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/119/05119327.pdf
[firstpage_image] =>[orig_patent_app_number] => 460205
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/460205 | Text comparator with counters for indicating positions of correctly decoding text elements within an ordered sequence of text elements | Jan 1, 1990 | Issued |
Array
(
[id] => 2928281
[patent_doc_number] => 05179711
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-01-12
[patent_title] => 'Minimum identical consecutive run length data units compression method by searching consecutive data pair comparison results stored in a string'
[patent_app_type] => 1
[patent_app_number] => 7/456890
[patent_app_country] => US
[patent_app_date] => 1989-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 6026
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/179/05179711.pdf
[firstpage_image] =>[orig_patent_app_number] => 456890
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/456890 | Minimum identical consecutive run length data units compression method by searching consecutive data pair comparison results stored in a string | Dec 25, 1989 | Issued |
Array
(
[id] => 2951505
[patent_doc_number] => 05261076
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-09
[patent_title] => 'Method for programming a pin compatible memory device by maintaining a reset clock signal longer than a regular reset duration'
[patent_app_type] => 1
[patent_app_number] => 7/453710
[patent_app_country] => US
[patent_app_date] => 1989-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 6198
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 318
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/261/05261076.pdf
[firstpage_image] =>[orig_patent_app_number] => 453710
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/453710 | Method for programming a pin compatible memory device by maintaining a reset clock signal longer than a regular reset duration | Dec 19, 1989 | Issued |
Array
(
[id] => 2589259
[patent_doc_number] => 04974194
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'Method for modifying intermingled text object and graphic object within an object set individually or correspondingly'
[patent_app_type] => 1
[patent_app_number] => 7/445140
[patent_app_country] => US
[patent_app_date] => 1989-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 8032
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/974/04974194.pdf
[firstpage_image] =>[orig_patent_app_number] => 445140
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/445140 | Method for modifying intermingled text object and graphic object within an object set individually or correspondingly | Dec 3, 1989 | Issued |
Array
(
[id] => 2757502
[patent_doc_number] => 05031091
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-09
[patent_title] => 'Channel control system having device control block and corresponding device control word with channel command part and I/O command part'
[patent_app_type] => 1
[patent_app_number] => 7/433435
[patent_app_country] => US
[patent_app_date] => 1989-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3392
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/031/05031091.pdf
[firstpage_image] =>[orig_patent_app_number] => 433435
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/433435 | Channel control system having device control block and corresponding device control word with channel command part and I/O command part | Nov 7, 1989 | Issued |
Array
(
[id] => 2604532
[patent_doc_number] => 04975833
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-12-04
[patent_title] => 'Multiprocessor system which only allows alternately accessing to shared memory upon receiving read and write request signals'
[patent_app_type] => 1
[patent_app_number] => 7/433433
[patent_app_country] => US
[patent_app_date] => 1989-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 2072
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 282
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/975/04975833.pdf
[firstpage_image] =>[orig_patent_app_number] => 433433
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/433433 | Multiprocessor system which only allows alternately accessing to shared memory upon receiving read and write request signals | Nov 7, 1989 | Issued |
Array
(
[id] => 2931015
[patent_doc_number] => 05206946
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-27
[patent_title] => 'Apparatus using converters, multiplexer and two latches to convert SCSI data into serial data and vice versa'
[patent_app_type] => 1
[patent_app_number] => 7/427723
[patent_app_country] => US
[patent_app_date] => 1989-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3149
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 313
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/206/05206946.pdf
[firstpage_image] =>[orig_patent_app_number] => 427723
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/427723 | Apparatus using converters, multiplexer and two latches to convert SCSI data into serial data and vice versa | Oct 26, 1989 | Issued |
| 07/427995 | INFORMATION PROCESSING SYSTEM INCLUDING A WORD PROCESSOR CAPABLE OF COMMUNICATING WITH FACSIMILE APPARATUS | Oct 26, 1989 | Abandoned |
Array
(
[id] => 2647267
[patent_doc_number] => 04914625
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-04-03
[patent_title] => 'Bypass mechanism for daisy chain connected units'
[patent_app_type] => 1
[patent_app_number] => 7/423737
[patent_app_country] => US
[patent_app_date] => 1989-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2586
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 368
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/914/04914625.pdf
[firstpage_image] =>[orig_patent_app_number] => 423737
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/423737 | Bypass mechanism for daisy chain connected units | Oct 15, 1989 | Issued |
Array
(
[id] => 2598488
[patent_doc_number] => 04970683
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-13
[patent_title] => 'Computerized checklist with predetermined sequences of sublists which automatically returns to skipped checklists'
[patent_app_type] => 1
[patent_app_number] => 7/423574
[patent_app_country] => US
[patent_app_date] => 1989-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2381
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 432
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/970/04970683.pdf
[firstpage_image] =>[orig_patent_app_number] => 423574
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/423574 | Computerized checklist with predetermined sequences of sublists which automatically returns to skipped checklists | Oct 15, 1989 | Issued |
Array
(
[id] => 2679930
[patent_doc_number] => 05034915
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-23
[patent_title] => 'Data storage system for transferring last entered information from static memory to magnetic disk upon recovering from data storage interruption'
[patent_app_type] => 1
[patent_app_number] => 7/409966
[patent_app_country] => US
[patent_app_date] => 1989-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3647
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/034/05034915.pdf
[firstpage_image] =>[orig_patent_app_number] => 409966
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/409966 | Data storage system for transferring last entered information from static memory to magnetic disk upon recovering from data storage interruption | Sep 17, 1989 | Issued |
Array
(
[id] => 2733688
[patent_doc_number] => 05058001
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-15
[patent_title] => 'Two-dimensional array of processing elements for emulating a multi-dimensional network'
[patent_app_type] => 1
[patent_app_number] => 7/407678
[patent_app_country] => US
[patent_app_date] => 1989-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3831
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/058/05058001.pdf
[firstpage_image] =>[orig_patent_app_number] => 407678
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/407678 | Two-dimensional array of processing elements for emulating a multi-dimensional network | Sep 13, 1989 | Issued |