Dominic Joseph Bologna

Array ( [id] => 2682622 [patent_doc_number] => 05027315 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-25 [patent_title] => 'Programmable logic array using internally generated dynamic logic signals as selection signals for controlling its functions' [patent_app_type] => 1 [patent_app_number] => 7/401528 [patent_app_country] => US [patent_app_date] => 1989-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4555 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/027/05027315.pdf [firstpage_image] =>[orig_patent_app_number] => 401528 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2688124 [patent_doc_number] => 05005119 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-02 [patent_title] => 'User interactive control of computer programs and corresponding versions of input/output data flow' [patent_app_type] => 1 [patent_app_number] => 7/401461 [patent_app_country] => US [patent_app_date] => 1989-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7271 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/005/05005119.pdf [firstpage_image] =>[orig_patent_app_number] => 401461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2998927 [patent_doc_number] => 05251318 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-05 [patent_title] => 'Multiprocessing system comparing information copied from extended storage before and after processing for serializing access to shared resource' [patent_app_type] => 1 [patent_app_number] => 7/397679 [patent_app_country] => US [patent_app_date] => 1989-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 36 [patent_no_of_words] => 17617 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/251/05251318.pdf [firstpage_image] =>[orig_patent_app_number] => 397679 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2564417 [patent_doc_number] => 04961133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-02 [patent_title] => 'Method for providing a virtual execution environment on a target computer using a virtual software machine' [patent_app_type] => 1 [patent_app_number] => 7/391691 [patent_app_country] => US [patent_app_date] => 1989-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4021 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/961/04961133.pdf [firstpage_image] =>[orig_patent_app_number] => 391691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2663761 [patent_doc_number] => 04972317 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-11-20 [patent_title] => 'Microprocessor implemented data processing system capable of emulating execution of special instructions not within the established microprocessor instruction set by switching access from a main store portion of a memory' [patent_app_type] => 1 [patent_app_number] => 7/390454 [patent_app_country] => US [patent_app_date] => 1989-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4646 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/972/04972317.pdf [firstpage_image] =>[orig_patent_app_number] => 390454 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2635826 [patent_doc_number] => 04967353 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-30 [patent_title] => 'System for periodically reallocating page frames in memory based upon non-usage within a time period or after being allocated' [patent_app_type] => 1 [patent_app_number] => 7/390474 [patent_app_country] => US [patent_app_date] => 1989-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4657 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/967/04967353.pdf [firstpage_image] =>[orig_patent_app_number] => 390474 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2721301 [patent_doc_number] => 05010478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-23 [patent_title] => 'Entity-attribute value database system with inverse attribute for selectively relating two different entities' [patent_app_type] => 1 [patent_app_number] => 7/393093 [patent_app_country] => US [patent_app_date] => 1989-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 18045 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010478.pdf [firstpage_image] =>[orig_patent_app_number] => 393093 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2772342 [patent_doc_number] => 04994960 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'Interrupt system for transmitting interrupt request signal and interrupt vector based upon output of synchronized counters representing selected priority value' [patent_app_type] => 1 [patent_app_number] => 7/378422 [patent_app_country] => US [patent_app_date] => 1989-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2461 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/994/04994960.pdf [firstpage_image] =>[orig_patent_app_number] => 378422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2597879 [patent_doc_number] => 04959774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-25 [patent_title] => 'Shadow memory system for storing variable backup blocks in consecutive time periods' [patent_app_type] => 1 [patent_app_number] => 7/374614 [patent_app_country] => US [patent_app_date] => 1989-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5468 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/959/04959774.pdf [firstpage_image] =>[orig_patent_app_number] => 374614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2943369 [patent_doc_number] => 05189610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-23 [patent_title] => 'Electronic dictionary with correct and incorrect words' [patent_app_type] => 1 [patent_app_number] => 7/355062 [patent_app_country] => US [patent_app_date] => 1989-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 6473 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/189/05189610.pdf [firstpage_image] =>[orig_patent_app_number] => 355062 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3023652 [patent_doc_number] => 05276814 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-01-04 [patent_title] => 'Method for transferring information between main store and input output bus units via a sequence of asynchronous bus and two synchronous buses' [patent_app_type] => 1 [patent_app_number] => 7/351181 [patent_app_country] => US [patent_app_date] => 1989-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 49 [patent_no_of_words] => 31708 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 389 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/276/05276814.pdf [firstpage_image] =>[orig_patent_app_number] => 351181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2721375 [patent_doc_number] => 05010482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-23 [patent_title] => 'Multi-event mechanism for queuing happened events for a large data processing system' [patent_app_type] => 1 [patent_app_number] => 7/328812 [patent_app_country] => US [patent_app_date] => 1989-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 8804 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/010/05010482.pdf [firstpage_image] =>[orig_patent_app_number] => 328812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2672497 [patent_doc_number] => 04947370 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-07 [patent_title] => 'Word processor for simultaneously displaying and scrolling documents and the corresponding titles' [patent_app_type] => 1 [patent_app_number] => 7/320874 [patent_app_country] => US [patent_app_date] => 1989-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2526 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/947/04947370.pdf [firstpage_image] =>[orig_patent_app_number] => 320874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2678227 [patent_doc_number] => 04954982 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-04 [patent_title] => 'Method and circuit for checking storage protection by pre-checking an access request key' [patent_app_type] => 1 [patent_app_number] => 7/315213 [patent_app_country] => US [patent_app_date] => 1989-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2560 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/954/04954982.pdf [firstpage_image] =>[orig_patent_app_number] => 315213 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2756021 [patent_doc_number] => 05016164 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-14 [patent_title] => 'Computer system having delayed save on procedure calls' [patent_app_type] => 1 [patent_app_number] => 7/317061 [patent_app_country] => US [patent_app_date] => 1989-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2684 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/016/05016164.pdf [firstpage_image] =>[orig_patent_app_number] => 317061 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2671424 [patent_doc_number] => 04947315 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-07 [patent_title] => 'System for controlling instrument using a levels data structure and concurrently running compiler task and operator task' [patent_app_type] => 1 [patent_app_number] => 7/314282 [patent_app_country] => US [patent_app_date] => 1989-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5234 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/947/04947315.pdf [firstpage_image] =>[orig_patent_app_number] => 314282 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2778393 [patent_doc_number] => 04985825 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-15 [patent_title] => 'System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer' [patent_app_type] => 1 [patent_app_number] => 7/306866 [patent_app_country] => US [patent_app_date] => 1989-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13811 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/985/04985825.pdf [firstpage_image] =>[orig_patent_app_number] => 306866 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2715681 [patent_doc_number] => 05001624 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-03-19 [patent_title] => 'Processor controlled DMA controller for transferring instruction and data from memory to coprocessor' [patent_app_type] => 1 [patent_app_number] => 7/303024 [patent_app_country] => US [patent_app_date] => 1989-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 7198 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/001/05001624.pdf [firstpage_image] =>[orig_patent_app_number] => 303024 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2635269 [patent_doc_number] => 04951194 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-08-21 [patent_title] => 'Method for reducing memory allocations and data copying operations during program calling sequences' [patent_app_type] => 1 [patent_app_number] => 7/299581 [patent_app_country] => US [patent_app_date] => 1989-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 6142 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 392 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/951/04951194.pdf [firstpage_image] =>[orig_patent_app_number] => 299581 [rel_patent_id] =>[rel_patent_doc_number] =>)