Search

Dominick L. Plakkoottam

Examiner (ID: 412, Phone: (571)270-7571 , Office: P/3746 )

Most Active Art Unit
3746
Art Unit(s)
3746
Total Applications
867
Issued Applications
610
Pending Applications
81
Abandoned Applications
195

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10679901 [patent_doc_number] => 20160026046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-28 [patent_title] => 'ACTIVE-MATRIX SUBSTRATE AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/774547 [patent_app_country] => US [patent_app_date] => 2014-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16298 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14774547 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/774547
Active-matrix substrate and display device Feb 18, 2014 Issued
Array ( [id] => 14011641 [patent_doc_number] => 10224296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Device and method for generating identification key [patent_app_type] => utility [patent_app_number] => 14/916949 [patent_app_country] => US [patent_app_date] => 2014-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7784 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14916949 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/916949
Device and method for generating identification key Feb 16, 2014 Issued
Array ( [id] => 9682577 [patent_doc_number] => 20140239340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'LIGHT EMITTING DEVICE, LIGHT EMITTING DEVICE PACKAGE, AND METHOD FOR MANUFACTURING LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/173408 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7563 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173408 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173408
Light emitting device and light emitting device package Feb 4, 2014 Issued
Array ( [id] => 9753893 [patent_doc_number] => 20140284593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-25 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/173028 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10100 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173028 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173028
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Feb 4, 2014 Abandoned
Array ( [id] => 10189558 [patent_doc_number] => 09218987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'Method for top-side cooled semiconductor package with stacked interconnection plates' [patent_app_type] => utility [patent_app_number] => 14/173151 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 7160 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173151 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173151
Method for top-side cooled semiconductor package with stacked interconnection plates Feb 4, 2014 Issued
Array ( [id] => 9639302 [patent_doc_number] => 20140217412 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/172932 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 8724 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14172932 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/172932
Display device Feb 4, 2014 Issued
Array ( [id] => 11453372 [patent_doc_number] => 09577024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Integrated circuit inductor' [patent_app_type] => utility [patent_app_number] => 14/172969 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 2894 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14172969 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/172969
Integrated circuit inductor Feb 4, 2014 Issued
Array ( [id] => 13099193 [patent_doc_number] => 10068942 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-04 [patent_title] => Photodiode array having a charge-absorbing doped region [patent_app_type] => utility [patent_app_number] => 14/764713 [patent_app_country] => US [patent_app_date] => 2014-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3698 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764713 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/764713
Photodiode array having a charge-absorbing doped region Jan 30, 2014 Issued
Array ( [id] => 9639290 [patent_doc_number] => 20140217400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'SEMICONDUCTOR ELEMENT STRUCTURE AND MANUFACTURING METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 14/169596 [patent_app_country] => US [patent_app_date] => 2014-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4729 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14169596 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/169596
SEMICONDUCTOR ELEMENT STRUCTURE AND MANUFACTURING METHOD FOR THE SAME Jan 30, 2014 Abandoned
Array ( [id] => 10402847 [patent_doc_number] => 20150287855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-08 [patent_title] => 'ELECTRO-OPTICAL DEVICE' [patent_app_type] => utility [patent_app_number] => 14/167415 [patent_app_country] => US [patent_app_date] => 2014-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13050 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14167415 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/167415
Electro-optical device Jan 28, 2014 Issued
Array ( [id] => 9710656 [patent_doc_number] => 08835223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Chip assembly having via interconnects joined by plating' [patent_app_type] => utility [patent_app_number] => 14/162011 [patent_app_country] => US [patent_app_date] => 2014-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 23 [patent_no_of_words] => 6634 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14162011 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/162011
Chip assembly having via interconnects joined by plating Jan 22, 2014 Issued
Array ( [id] => 11346272 [patent_doc_number] => 09530687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'Method of manufacturing bonded substrate, bonded substrate, method of manufacturing solid-state imaging apparatus, solid-state imaging apparatus, and camera' [patent_app_type] => utility [patent_app_number] => 14/147003 [patent_app_country] => US [patent_app_date] => 2014-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 24 [patent_no_of_words] => 13176 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14147003 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/147003
Method of manufacturing bonded substrate, bonded substrate, method of manufacturing solid-state imaging apparatus, solid-state imaging apparatus, and camera Jan 2, 2014 Issued
Array ( [id] => 9569341 [patent_doc_number] => 20140187055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'SHORT PULSE FIBER LASER FOR LTPS CRYSTALLIZATION' [patent_app_type] => utility [patent_app_number] => 14/144350 [patent_app_country] => US [patent_app_date] => 2013-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4152 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14144350 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/144350
Short pulse fiber laser for LTPS crystallization Dec 29, 2013 Issued
Array ( [id] => 10302761 [patent_doc_number] => 20150187761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'Method for Manufacturing a Semiconductor Device and a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 14/141832 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7476 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141832 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/141832
Method for manufacturing a semiconductor device and a semiconductor device Dec 26, 2013 Issued
Array ( [id] => 10525622 [patent_doc_number] => 09252142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Integrated circuits including a resistance element and gate-last techniques for forming the integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/141530 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5471 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14141530 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/141530
Integrated circuits including a resistance element and gate-last techniques for forming the integrated circuits Dec 26, 2013 Issued
Array ( [id] => 10189715 [patent_doc_number] => 09219146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-22 [patent_title] => 'High voltage PMOS and the method for forming thereof' [patent_app_type] => utility [patent_app_number] => 14/142582 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 20 [patent_no_of_words] => 3426 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142582 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/142582
High voltage PMOS and the method for forming thereof Dec 26, 2013 Issued
Array ( [id] => 10604095 [patent_doc_number] => 09324665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Metal fuse by topology' [patent_app_type] => utility [patent_app_number] => 14/142629 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 9399 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142629 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/142629
Metal fuse by topology Dec 26, 2013 Issued
Array ( [id] => 11802332 [patent_doc_number] => 09543229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-10 [patent_title] => 'Combination of TSV and back side wiring in 3D integration' [patent_app_type] => utility [patent_app_number] => 14/142599 [patent_app_country] => US [patent_app_date] => 2013-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6384 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14142599 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/142599
Combination of TSV and back side wiring in 3D integration Dec 26, 2013 Issued
Array ( [id] => 10302841 [patent_doc_number] => 20150187841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-02 [patent_title] => 'Method of forming current-programmable inline resistor' [patent_app_type] => utility [patent_app_number] => 14/140723 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14140723 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/140723
Method of forming current-programmable inline resistor Dec 25, 2013 Abandoned
Array ( [id] => 12534645 [patent_doc_number] => 10008405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Expansion method, method for manufacturing semiconductor device, and semiconductor device [patent_app_type] => utility [patent_app_number] => 14/655079 [patent_app_country] => US [patent_app_date] => 2013-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 21 [patent_no_of_words] => 12182 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14655079 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/655079
Expansion method, method for manufacturing semiconductor device, and semiconductor device Dec 25, 2013 Issued
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