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Dominique A Womack

Examiner (ID: 9934)

Most Active Art Unit
1794
Art Unit(s)
1794
Total Applications
24
Issued Applications
4
Pending Applications
0
Abandoned Applications
20

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19108778 [patent_doc_number] => 11961892 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Contacts for highly scaled transistors [patent_app_type] => utility [patent_app_number] => 17/837899 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 52 [patent_no_of_words] => 10265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17837899 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/837899
Contacts for highly scaled transistors Jun 9, 2022 Issued
Array ( [id] => 19229782 [patent_doc_number] => 12009426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Structure and method for FinFET device with asymmetric contact [patent_app_type] => utility [patent_app_number] => 17/827457 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17827457 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/827457
Structure and method for FinFET device with asymmetric contact May 26, 2022 Issued
Array ( [id] => 18751499 [patent_doc_number] => 11810820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Through electrode substrate, method of manufacturing through electrode substrate, and mounting substrate [patent_app_type] => utility [patent_app_number] => 17/752062 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 59 [patent_no_of_words] => 16581 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752062 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752062
Through electrode substrate, method of manufacturing through electrode substrate, and mounting substrate May 23, 2022 Issued
Array ( [id] => 19029967 [patent_doc_number] => 11929333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Integrated fan-out package [patent_app_type] => utility [patent_app_number] => 17/740373 [patent_app_country] => US [patent_app_date] => 2022-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 69 [patent_no_of_words] => 13475 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17740373 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/740373
Integrated fan-out package May 9, 2022 Issued
Array ( [id] => 18528770 [patent_doc_number] => 11715775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-01 [patent_title] => Self-aligned gate endcap (SAGE) architectures with gate-all-around devices having epitaxial source or drain structures [patent_app_type] => utility [patent_app_number] => 17/733834 [patent_app_country] => US [patent_app_date] => 2022-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 15272 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17733834 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/733834
Self-aligned gate endcap (SAGE) architectures with gate-all-around devices having epitaxial source or drain structures Apr 28, 2022 Issued
Array ( [id] => 18712950 [patent_doc_number] => 20230335583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => DEEP TRENCH ISOLATION STRUCTURES WITH A SUBSTRATE CONNECTION [patent_app_type] => utility [patent_app_number] => 17/723665 [patent_app_country] => US [patent_app_date] => 2022-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17723665 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/723665
DEEP TRENCH ISOLATION STRUCTURES WITH A SUBSTRATE CONNECTION Apr 18, 2022 Pending
Array ( [id] => 18623964 [patent_doc_number] => 11757022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Parasitic capacitance reduction [patent_app_type] => utility [patent_app_number] => 17/717777 [patent_app_country] => US [patent_app_date] => 2022-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7829 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17717777 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/717777
Parasitic capacitance reduction Apr 10, 2022 Issued
Array ( [id] => 18623902 [patent_doc_number] => 11756958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Semiconductor device structure and methods of forming the same [patent_app_type] => utility [patent_app_number] => 17/708769 [patent_app_country] => US [patent_app_date] => 2022-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 57 [patent_no_of_words] => 9212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17708769 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/708769
Semiconductor device structure and methods of forming the same Mar 29, 2022 Issued
Array ( [id] => 18840163 [patent_doc_number] => 11848242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Method of manufacturing a semiconductor device and a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/706362 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 94 [patent_figures_cnt] => 236 [patent_no_of_words] => 19586 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706362 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/706362
Method of manufacturing a semiconductor device and a semiconductor device Mar 27, 2022 Issued
Array ( [id] => 17810969 [patent_doc_number] => 20220262804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => SEMICONDUCTOR DEVICE WITH AIR GAP BETWEEN CONDUCTIVE FEATURES [patent_app_type] => utility [patent_app_number] => 17/701972 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701972 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701972
Semiconductor device with air gap between conductive features Mar 22, 2022 Issued
Array ( [id] => 17723399 [patent_doc_number] => 20220216121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/700956 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700956 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/700956
Semiconductor package structure and fabrication method thereof Mar 21, 2022 Issued
Array ( [id] => 17708975 [patent_doc_number] => 20220208983 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => CONTACTS FOR HIGHLY SCALED TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/694043 [patent_app_country] => US [patent_app_date] => 2022-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17694043 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/694043
Contacts for highly scaled transistors Mar 13, 2022 Issued
Array ( [id] => 17692310 [patent_doc_number] => 20220199603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/692954 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6006 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17692954 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/692954
Semiconductor device and method of manufacturing the same Mar 10, 2022 Issued
Array ( [id] => 19314575 [patent_doc_number] => 12040402 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/690178 [patent_app_country] => US [patent_app_date] => 2022-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 12004 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17690178 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/690178
Semiconductor device Mar 8, 2022 Issued
Array ( [id] => 17676971 [patent_doc_number] => 20220190138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/684240 [patent_app_country] => US [patent_app_date] => 2022-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5280 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684240 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684240
Semiconductor structure and method for fabricating the same Feb 28, 2022 Issued
Array ( [id] => 18322410 [patent_doc_number] => 20230120538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => LATERAL BIPOLAR JUNCTION TRANSISTORS WITH AN AIRGAP SPACER [patent_app_type] => utility [patent_app_number] => 17/680434 [patent_app_country] => US [patent_app_date] => 2022-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17680434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/680434
Lateral bipolar junction transistors with an airgap spacer Feb 24, 2022 Issued
Array ( [id] => 17645331 [patent_doc_number] => 20220173070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/674854 [patent_app_country] => US [patent_app_date] => 2022-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17674854 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/674854
Package structure Feb 17, 2022 Issued
Array ( [id] => 18387324 [patent_doc_number] => 11658117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Semiconductor devices having improved electrical characteristics and methods of fabricating the same [patent_app_type] => utility [patent_app_number] => 17/667866 [patent_app_country] => US [patent_app_date] => 2022-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 43 [patent_no_of_words] => 8681 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17667866 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/667866
Semiconductor devices having improved electrical characteristics and methods of fabricating the same Feb 8, 2022 Issued
Array ( [id] => 17615658 [patent_doc_number] => 20220157938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR STRUCTURE WITH EXTENDED CONTACT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/666051 [patent_app_country] => US [patent_app_date] => 2022-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17666051 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/666051
Semiconductor structure with extended contact structure Feb 6, 2022 Issued
Array ( [id] => 17615504 [patent_doc_number] => 20220157784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/590373 [patent_app_country] => US [patent_app_date] => 2022-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17590373 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/590373
Memory device Jan 31, 2022 Issued
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