Dominique A Womack
Examiner (ID: 9934)
Most Active Art Unit | 1794 |
Art Unit(s) | 1794 |
Total Applications | 24 |
Issued Applications | 4 |
Pending Applications | 0 |
Abandoned Applications | 20 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 17692515
[patent_doc_number] => 20220199808
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-23
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/226462
[patent_app_country] => US
[patent_app_date] => 2021-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9150
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17226462
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/226462 | Semiconductor structure and method for forming the same | Apr 8, 2021 | Issued |
Array
(
[id] => 17933356
[patent_doc_number] => 20220328482
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/225907
[patent_app_country] => US
[patent_app_date] => 2021-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8021
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225907
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/225907 | Semiconductor device structure and methods of forming the same | Apr 7, 2021 | Issued |
Array
(
[id] => 17917705
[patent_doc_number] => 20220320101
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/221664
[patent_app_country] => US
[patent_app_date] => 2021-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5532
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17221664
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/221664 | Semiconductor memory device and method of forming the same | Apr 1, 2021 | Issued |
Array
(
[id] => 17159121
[patent_doc_number] => 20210320172
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-14
[patent_title] => SEMICONDUCTOR DEVICE WITH AIR GAP AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/219912
[patent_app_country] => US
[patent_app_date] => 2021-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3306
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219912
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/219912 | Semiconductor device with air gap and method of fabricating the same | Mar 31, 2021 | Issued |
Array
(
[id] => 17772460
[patent_doc_number] => 11404412
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-02
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/204621
[patent_app_country] => US
[patent_app_date] => 2021-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 44
[patent_figures_cnt] => 44
[patent_no_of_words] => 13393
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17204621
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/204621 | Semiconductor device | Mar 16, 2021 | Issued |
Array
(
[id] => 16936485
[patent_doc_number] => 20210202374
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => MICROELECTRONIC DEVICES HAVING AIR GAP STRUCTURES INTEGRATED WITH INTERCONNECT FOR REDUCED PARASITIC CAPACITANCES
[patent_app_type] => utility
[patent_app_number] => 17/202281
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4625
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202281
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/202281 | Microelectronic devices having air gap structures integrated with interconnect for reduced parasitic capacitances | Mar 14, 2021 | Issued |
Array
(
[id] => 17908757
[patent_doc_number] => 11462621
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-04
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/200908
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 14
[patent_no_of_words] => 10392
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200908
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/200908 | Semiconductor device | Mar 14, 2021 | Issued |
Array
(
[id] => 19291723
[patent_doc_number] => 12031070
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-09
[patent_title] => Quantum well nanocrystals with quaternary alloy structure for improved light absorption
[patent_app_type] => utility
[patent_app_number] => 17/199613
[patent_app_country] => US
[patent_app_date] => 2021-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 23225
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199613
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/199613 | Quantum well nanocrystals with quaternary alloy structure for improved light absorption | Mar 11, 2021 | Issued |
Array
(
[id] => 18623816
[patent_doc_number] => 11756872
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-12
[patent_title] => Package structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/199348
[patent_app_country] => US
[patent_app_date] => 2021-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 32
[patent_figures_cnt] => 55
[patent_no_of_words] => 13444
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199348
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/199348 | Package structure and manufacturing method thereof | Mar 10, 2021 | Issued |
Array
(
[id] => 17247164
[patent_doc_number] => 20210366909
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => FIN FIELD-EFFECT TRANSISTOR AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/195984
[patent_app_country] => US
[patent_app_date] => 2021-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7178
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195984
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/195984 | Fin field-effect transistor and method of forming the same | Mar 8, 2021 | Issued |
Array
(
[id] => 17847992
[patent_doc_number] => 11437378
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-06
[patent_title] => Semiconductor structure and formation method thereof
[patent_app_type] => utility
[patent_app_number] => 17/249495
[patent_app_country] => US
[patent_app_date] => 2021-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 5932
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 183
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17249495
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/249495 | Semiconductor structure and formation method thereof | Mar 2, 2021 | Issued |
Array
(
[id] => 16905092
[patent_doc_number] => 20210184008
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => DUAL METAL CAPPED VIA CONTACT STRUCTURES FOR SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/190236
[patent_app_country] => US
[patent_app_date] => 2021-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12843
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190236
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/190236 | Dual metal capped via contact structures for semiconductor devices | Mar 1, 2021 | Issued |
Array
(
[id] => 17840791
[patent_doc_number] => 20220278097
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-01
[patent_title] => Semiconductor Device and Method of Forming Same
[patent_app_type] => utility
[patent_app_number] => 17/186293
[patent_app_country] => US
[patent_app_date] => 2021-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10293
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186293
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/186293 | Semiconductor device and method of forming same | Feb 25, 2021 | Issued |
Array
(
[id] => 17758185
[patent_doc_number] => 11398484
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-07-26
[patent_title] => Semiconductor device with air gap between bit line and capacitor contact and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 17/178984
[patent_app_country] => US
[patent_app_date] => 2021-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 6984
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17178984
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/178984 | Semiconductor device with air gap between bit line and capacitor contact and method for forming the same | Feb 17, 2021 | Issued |
Array
(
[id] => 16888924
[patent_doc_number] => 20210175121
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-10
[patent_title] => THROUGH ELECTRODE SUBSTRATE, METHOD OF MANUFACTURING THROUGH ELECTRODE SUBSTRATE, AND MOUNTING SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 17/178659
[patent_app_country] => US
[patent_app_date] => 2021-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16537
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17178659
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/178659 | Through electrode substrate, method of manufacturing through electrode substrate, and mounting substrate | Feb 17, 2021 | Issued |
Array
(
[id] => 16904902
[patent_doc_number] => 20210183818
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => SEMICONDUCTOR PACKAGE HAVING CHIP STACK
[patent_app_type] => utility
[patent_app_number] => 17/169701
[patent_app_country] => US
[patent_app_date] => 2021-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7629
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17169701
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/169701 | Semiconductor package having chip stack | Feb 7, 2021 | Issued |
Array
(
[id] => 17417140
[patent_doc_number] => 20220052044
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-17
[patent_title] => Epitaxy Regions Extending Below STI Regions and Profiles Thereof
[patent_app_type] => utility
[patent_app_number] => 17/167336
[patent_app_country] => US
[patent_app_date] => 2021-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8581
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17167336
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/167336 | Epitaxy regions extending below STI regions and profiles thereof | Feb 3, 2021 | Issued |
Array
(
[id] => 17188788
[patent_doc_number] => 20210335673
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-28
[patent_title] => INTERCONNECT STRUCTURES FOR SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/166548
[patent_app_country] => US
[patent_app_date] => 2021-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11026
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17166548
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/166548 | Interconnect structures for semiconductor devices and methods of manufacturing the same | Feb 2, 2021 | Issued |
Array
(
[id] => 17925966
[patent_doc_number] => 11469229
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-11
[patent_title] => Semiconductor device and method
[patent_app_type] => utility
[patent_app_number] => 17/149950
[patent_app_country] => US
[patent_app_date] => 2021-01-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 30
[patent_no_of_words] => 11892
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17149950
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/149950 | Semiconductor device and method | Jan 14, 2021 | Issued |
Array
(
[id] => 17737971
[patent_doc_number] => 20220223433
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-14
[patent_title] => WAFER-TO-WAFER INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/146438
[patent_app_country] => US
[patent_app_date] => 2021-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3313
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146438
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/146438 | Wafer-to-wafer interconnection structure and method of manufacturing the same | Jan 10, 2021 | Issued |