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Dominique A Womack

Examiner (ID: 9934)

Most Active Art Unit
1794
Art Unit(s)
1794
Total Applications
24
Issued Applications
4
Pending Applications
0
Abandoned Applications
20

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18371923 [patent_doc_number] => 11652105 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Epitaxy regions with large landing areas for contact plugs [patent_app_type] => utility [patent_app_number] => 17/143681 [patent_app_country] => US [patent_app_date] => 2021-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 8266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17143681 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/143681
Epitaxy regions with large landing areas for contact plugs Jan 6, 2021 Issued
Array ( [id] => 16873824 [patent_doc_number] => 20210167291 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => Vapor Jet Printing [patent_app_type] => utility [patent_app_number] => 17/142490 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13148 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142490 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142490
Vapor jet printing Jan 5, 2021 Issued
Array ( [id] => 17908749 [patent_doc_number] => 11462612 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Semiconductor device structure [patent_app_type] => utility [patent_app_number] => 17/142970 [patent_app_country] => US [patent_app_date] => 2021-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17142970 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/142970
Semiconductor device structure Jan 5, 2021 Issued
Array ( [id] => 18464338 [patent_doc_number] => 11688632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-27 [patent_title] => Semiconductor device with linerless contacts [patent_app_type] => utility [patent_app_number] => 17/136595 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6595 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136595 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136595
Semiconductor device with linerless contacts Dec 28, 2020 Issued
Array ( [id] => 17956455 [patent_doc_number] => 11482570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-25 [patent_title] => Methods of forming magnetoresistive devices and integrated circuits [patent_app_type] => utility [patent_app_number] => 17/134865 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134865 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134865
Methods of forming magnetoresistive devices and integrated circuits Dec 27, 2020 Issued
Array ( [id] => 16850696 [patent_doc_number] => 20210151441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => METHOD FOR PREPARING SEMICONDUCTOR DEVICE WITH AIR GAP STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/130478 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17130478 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/130478
Method for preparing semiconductor device with air gap structure Dec 21, 2020 Issued
Array ( [id] => 17956490 [patent_doc_number] => 11482605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-25 [patent_title] => Work function metal gate device [patent_app_type] => utility [patent_app_number] => 17/128168 [patent_app_country] => US [patent_app_date] => 2020-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17128168 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/128168
Work function metal gate device Dec 19, 2020 Issued
Array ( [id] => 17862834 [patent_doc_number] => 11443995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-13 [patent_title] => Integrated circuit package and method [patent_app_type] => utility [patent_app_number] => 17/120859 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 48 [patent_no_of_words] => 12669 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17120859 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/120859
Integrated circuit package and method Dec 13, 2020 Issued
Array ( [id] => 16812390 [patent_doc_number] => 20210134945 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-06 [patent_title] => ISOLATION STRUCTURES OF SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/120852 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13895 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17120852 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/120852
Isolation structures of semiconductor devices Dec 13, 2020 Issued
Array ( [id] => 17590768 [patent_doc_number] => 11329045 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-10 [patent_title] => Field effect transistor, method for making the same and layout in process of forming the same [patent_app_type] => utility [patent_app_number] => 17/118428 [patent_app_country] => US [patent_app_date] => 2020-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7602 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17118428 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/118428
Field effect transistor, method for making the same and layout in process of forming the same Dec 9, 2020 Issued
Array ( [id] => 16781716 [patent_doc_number] => 20210118795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/116926 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17116926 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/116926
Semiconductor structure and method of forming semiconductor package Dec 8, 2020 Issued
Array ( [id] => 16781666 [patent_doc_number] => 20210118745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-22 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/114347 [patent_app_country] => US [patent_app_date] => 2020-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19562 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17114347 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/114347
Method of manufacturing a semiconductor device and a semiconductor device Dec 6, 2020 Issued
Array ( [id] => 18857393 [patent_doc_number] => 11854988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Semiconductor device and method of manufacture [patent_app_type] => utility [patent_app_number] => 17/107181 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12728 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107181 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107181
Semiconductor device and method of manufacture Nov 29, 2020 Issued
Array ( [id] => 16724059 [patent_doc_number] => 20210091206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-25 [patent_title] => REPLACEMENT GATE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 17/100689 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 73844 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17100689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/100689
Replacement gate structures for advanced integrated circuit structure fabrication Nov 19, 2020 Issued
Array ( [id] => 17787739 [patent_doc_number] => 11410873 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Deep trench integration processes and devices [patent_app_type] => utility [patent_app_number] => 16/953567 [patent_app_country] => US [patent_app_date] => 2020-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5424 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16953567 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/953567
Deep trench integration processes and devices Nov 19, 2020 Issued
Array ( [id] => 17319204 [patent_doc_number] => 20210408254 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => SEMICONDUCTOR DEVICES INCLUDING CAPPING LAYER [patent_app_type] => utility [patent_app_number] => 16/950104 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950104 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950104
Semiconductor devices including capping layer Nov 16, 2020 Issued
Array ( [id] => 17971503 [patent_doc_number] => 11489054 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Raised epitaxial LDD in MuGFETs and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/099127 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 24 [patent_no_of_words] => 4423 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17099127 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/099127
Raised epitaxial LDD in MuGFETs and methods for forming the same Nov 15, 2020 Issued
Array ( [id] => 18402198 [patent_doc_number] => 11664348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-30 [patent_title] => Substrate assembly semiconductor package including the same and method of manufacturing 1HE semiconductor package [patent_app_type] => utility [patent_app_number] => 17/094267 [patent_app_country] => US [patent_app_date] => 2020-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8772 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17094267 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/094267
Substrate assembly semiconductor package including the same and method of manufacturing 1HE semiconductor package Nov 9, 2020 Issued
Array ( [id] => 17925983 [patent_doc_number] => 11469247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Semiconductor device and manufacturing method of a semiconductor device [patent_app_type] => utility [patent_app_number] => 17/091180 [patent_app_country] => US [patent_app_date] => 2020-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 27 [patent_no_of_words] => 11877 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17091180 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/091180
Semiconductor device and manufacturing method of a semiconductor device Nov 5, 2020 Issued
Array ( [id] => 17668299 [patent_doc_number] => 11362003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-14 [patent_title] => Prevention of contact bottom void in semiconductor fabrication [patent_app_type] => utility [patent_app_number] => 17/087174 [patent_app_country] => US [patent_app_date] => 2020-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8893 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087174 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/087174
Prevention of contact bottom void in semiconductor fabrication Nov 1, 2020 Issued
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