| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2872821
[patent_doc_number] => 05150474
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-22
[patent_title] => 'Method for transferring arguments between object programs by switching address modes according to mode identifying flag'
[patent_app_type] => 1
[patent_app_number] => 7/344614
[patent_app_country] => US
[patent_app_date] => 1989-04-28
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[pdf_file] => patents/05/150/05150474.pdf
[firstpage_image] =>[orig_patent_app_number] => 344614
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/344614 | Method for transferring arguments between object programs by switching address modes according to mode identifying flag | Apr 27, 1989 | Issued |
Array
(
[id] => 2798809
[patent_doc_number] => 05142680
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-08-25
[patent_title] => 'Method for loading an operating system through a network'
[patent_app_type] => 1
[patent_app_number] => 7/343843
[patent_app_country] => US
[patent_app_date] => 1989-04-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/142/05142680.pdf
[firstpage_image] =>[orig_patent_app_number] => 343843
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/343843 | Method for loading an operating system through a network | Apr 25, 1989 | Issued |
| 07/344518 | DOCUMENT PROCESSING APPARATUS FOR CORRECTING ADDRESS AND FORMAT INFORMATION OF DOCUMENT INFORMATION UP TO A DESIGNATED PAGE | Apr 23, 1989 | Abandoned |
Array
(
[id] => 2717429
[patent_doc_number] => 05056005
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-08
[patent_title] => 'Data buffer device using first-in first-out memory and data buffer array device'
[patent_app_type] => 1
[patent_app_number] => 7/337399
[patent_app_country] => US
[patent_app_date] => 1989-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
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[patent_words_short_claim] => 283
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[pdf_file] => patents/05/056/05056005.pdf
[firstpage_image] =>[orig_patent_app_number] => 337399
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/337399 | Data buffer device using first-in first-out memory and data buffer array device | Apr 12, 1989 | Issued |
| 07/334830 | LOCK CONVERTING BUS-TO-BUS INTERFACE SYSTEM | Apr 6, 1989 | Abandoned |
| 07/327448 | ARBITRATION SYSTEM | Mar 21, 1989 | Abandoned |
| 07/326857 | INPUT AND OUTPUT CONTROL SYSTEM | Mar 20, 1989 | Abandoned |
Array
(
[id] => 3023930
[patent_doc_number] => 05276828
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-01-04
[patent_title] => 'Methods of maintaining cache coherence and processor synchronization in a multiprocessor system using send and receive instructions'
[patent_app_type] => 1
[patent_app_number] => 7/317538
[patent_app_country] => US
[patent_app_date] => 1989-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => patents/05/276/05276828.pdf
[firstpage_image] =>[orig_patent_app_number] => 317538
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/317538 | Methods of maintaining cache coherence and processor synchronization in a multiprocessor system using send and receive instructions | Feb 28, 1989 | Issued |
Array
(
[id] => 2840964
[patent_doc_number] => 05099481
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-24
[patent_title] => 'Registered RAM array with parallel and serial interface'
[patent_app_type] => 1
[patent_app_number] => 7/317001
[patent_app_country] => US
[patent_app_date] => 1989-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/099/05099481.pdf
[firstpage_image] =>[orig_patent_app_number] => 317001
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/317001 | Registered RAM array with parallel and serial interface | Feb 27, 1989 | Issued |
Array
(
[id] => 2806501
[patent_doc_number] => 05144567
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-01
[patent_title] => 'Programmable plug and cable for computer keyboards'
[patent_app_type] => 1
[patent_app_number] => 7/315927
[patent_app_country] => US
[patent_app_date] => 1989-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/144/05144567.pdf
[firstpage_image] =>[orig_patent_app_number] => 315927
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/315927 | Programmable plug and cable for computer keyboards | Feb 26, 1989 | Issued |
Array
(
[id] => 2869258
[patent_doc_number] => 05083260
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-01-21
[patent_title] => 'Bus arbitration system for concurrent use of a system bus by more than one device'
[patent_app_type] => 1
[patent_app_number] => 7/315888
[patent_app_country] => US
[patent_app_date] => 1989-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[patent_no_of_words] => 10034
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/083/05083260.pdf
[firstpage_image] =>[orig_patent_app_number] => 315888
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/315888 | Bus arbitration system for concurrent use of a system bus by more than one device | Feb 26, 1989 | Issued |
| 07/307882 | METHOD AND APPARATUS FOR SHARING MEMORY IN A MULTIPROCESSOR SYSTEM | Feb 6, 1989 | Abandoned |
Array
(
[id] => 2702043
[patent_doc_number] => 05019965
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-28
[patent_title] => 'Method and apparatus for increasing the data storage rate of a computer system having a predefined data path width'
[patent_app_type] => 1
[patent_app_number] => 7/306826
[patent_app_country] => US
[patent_app_date] => 1989-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6110
[patent_no_of_claims] => 10
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/019/05019965.pdf
[firstpage_image] =>[orig_patent_app_number] => 306826
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/306826 | Method and apparatus for increasing the data storage rate of a computer system having a predefined data path width | Feb 2, 1989 | Issued |
| 07/291640 | NODE CONTROLLER FOR A LOCAL AREA NETWORK | Dec 28, 1988 | Abandoned |
| 07/287430 | OP BRANCHING FOR STARTING MICRO-ROUTINES | Dec 20, 1988 | Abandoned |
Array
(
[id] => 2600375
[patent_doc_number] => D0306427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-06
[patent_title] => 'Data selective switch or similar article'
[patent_app_type] => 4
[patent_app_number] => 7/286118
[patent_app_country] => US
[patent_app_date] => 1988-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/D0/306/D0306427.pdf
[firstpage_image] =>[orig_patent_app_number] => 286118
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/286118 | Assembler system for determining when to compile source code modules | Dec 18, 1988 | Issued |
Array
(
[id] => 2600375
[patent_doc_number] => D0306427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-06
[patent_title] => 'Data selective switch or similar article'
[patent_app_type] => 4
[patent_app_number] => 7/286118
[patent_app_country] => US
[patent_app_date] => 1988-08-24
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[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/D0/306/D0306427.pdf
[firstpage_image] =>[orig_patent_app_number] => 286118
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/286118 | Assembler system for determining when to compile source code modules | Dec 18, 1988 | Issued |
| 07/282455 | SINGLE DISK EMULATION INTERFACE FOR AN ARRAY OF ASYNCHRONOUSLY OPERATING DISK DRIVES | Dec 7, 1988 | Abandoned |
Array
(
[id] => 2817993
[patent_doc_number] => 05148523
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-09-15
[patent_title] => 'Dynamic video RAM incorporationg on chip line modification'
[patent_app_type] => 1
[patent_app_number] => 7/278333
[patent_app_country] => US
[patent_app_date] => 1988-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 24
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/148/05148523.pdf
[firstpage_image] =>[orig_patent_app_number] => 278333
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/278333 | Dynamic video RAM incorporationg on chip line modification | Nov 28, 1988 | Issued |
| 07/268504 | EXPANSIBLE FIXED DISK DRIVE SUBSYSTEM FOR COMPUTER | Nov 7, 1988 | Abandoned |