
Don P. Le
Examiner (ID: 5300, Phone: (571)272-1806 , Office: P/2844 )
| Most Active Art Unit | 2819 |
| Art Unit(s) | 2844, 2819 |
| Total Applications | 2669 |
| Issued Applications | 2528 |
| Pending Applications | 46 |
| Abandoned Applications | 99 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9376522
[patent_doc_number] => 08680787
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-25
[patent_title] => 'Load control device for a light-emitting diode light source'
[patent_app_type] => utility
[patent_app_number] => 13/416741
[patent_app_country] => US
[patent_app_date] => 2012-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 11729
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 209
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13416741
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/416741 | Load control device for a light-emitting diode light source | Mar 8, 2012 | Issued |
Array
(
[id] => 9356083
[patent_doc_number] => 08674624
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-03-18
[patent_title] => 'DC-DC converter and light emitting diode driving device including the same'
[patent_app_type] => utility
[patent_app_number] => 13/416228
[patent_app_country] => US
[patent_app_date] => 2012-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5677
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13416228
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/416228 | DC-DC converter and light emitting diode driving device including the same | Mar 8, 2012 | Issued |
Array
(
[id] => 8714043
[patent_doc_number] => 08400186
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-03-19
[patent_title] => 'Techniques for buffering single-ended and differential signals'
[patent_app_type] => utility
[patent_app_number] => 13/401562
[patent_app_country] => US
[patent_app_date] => 2012-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4579
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13401562
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/401562 | Techniques for buffering single-ended and differential signals | Feb 20, 2012 | Issued |
Array
(
[id] => 8357096
[patent_doc_number] => 20120212254
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-23
[patent_title] => 'SEMICONDUCTOR DEVICE HAVING CALIBRATION CIRCUIT FOR ADJUSTING OUTPUT IMPEDANCE OF OUTPUT BUFFER CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/401052
[patent_app_country] => US
[patent_app_date] => 2012-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4432
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13401052
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/401052 | Semiconductor device having calibration circuit for adjusting output impedance of output buffer circuit | Feb 20, 2012 | Issued |
Array
(
[id] => 8765428
[patent_doc_number] => 20130093465
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-18
[patent_title] => 'ASYMMETRICAL BUS KEEPER'
[patent_app_type] => utility
[patent_app_number] => 13/398929
[patent_app_country] => US
[patent_app_date] => 2012-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6674
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13398929
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/398929 | Asymmetrical bus keeper | Feb 16, 2012 | Issued |
Array
(
[id] => 8676298
[patent_doc_number] => 08384415
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method and system for identifying counterfeit programmable logic devices'
[patent_app_type] => utility
[patent_app_number] => 13/397232
[patent_app_country] => US
[patent_app_date] => 2012-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 7872
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397232
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/397232 | Method and system for identifying counterfeit programmable logic devices | Feb 14, 2012 | Issued |
Array
(
[id] => 8380109
[patent_doc_number] => 20120223736
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-09-06
[patent_title] => 'TRANSCEIVING CIRCUIT AND TRANSCEIVING CIRCUIT RESISTANCE CALIBRATION METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/397660
[patent_app_country] => US
[patent_app_date] => 2012-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4211
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13397660
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/397660 | Transceiving circuit and transceiving circuit resistance calibration method | Feb 14, 2012 | Issued |
Array
(
[id] => 8739043
[patent_doc_number] => 08410818
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-04-02
[patent_title] => 'High speed communication interface with an adaptive swing driver to reduce power consumption'
[patent_app_type] => utility
[patent_app_number] => 13/372978
[patent_app_country] => US
[patent_app_date] => 2012-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1748
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13372978
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/372978 | High speed communication interface with an adaptive swing driver to reduce power consumption | Feb 13, 2012 | Issued |
Array
(
[id] => 8739040
[patent_doc_number] => 08410816
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-04-02
[patent_title] => 'Low-swing signaling scheme for data communication'
[patent_app_type] => utility
[patent_app_number] => 13/370144
[patent_app_country] => US
[patent_app_date] => 2012-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9661
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 249
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13370144
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/370144 | Low-swing signaling scheme for data communication | Feb 8, 2012 | Issued |
Array
(
[id] => 8897401
[patent_doc_number] => 08476926
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-07-02
[patent_title] => 'Method and apparatus for implementing periphery devices on a programmable circuit using partial reconfiguration'
[patent_app_type] => utility
[patent_app_number] => 13/368437
[patent_app_country] => US
[patent_app_date] => 2012-02-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6087
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13368437
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/368437 | Method and apparatus for implementing periphery devices on a programmable circuit using partial reconfiguration | Feb 7, 2012 | Issued |
| 13/365997 | HIGH SPEED IO BUFFER | Feb 2, 2012 | Abandoned |
Array
(
[id] => 8750136
[patent_doc_number] => 08415970
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-04-09
[patent_title] => 'Method and apparatus for reducing crosstalk effects'
[patent_app_type] => utility
[patent_app_number] => 13/364449
[patent_app_country] => US
[patent_app_date] => 2012-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4198
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13364449
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/364449 | Method and apparatus for reducing crosstalk effects | Feb 1, 2012 | Issued |
Array
(
[id] => 9105165
[patent_doc_number] => 20130278296
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-24
[patent_title] => 'Multi-Modal Communication Interface'
[patent_app_type] => utility
[patent_app_number] => 13/880960
[patent_app_country] => US
[patent_app_date] => 2012-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4117
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13880960
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/880960 | Multi-modal communication interface | Jan 23, 2012 | Issued |
Array
(
[id] => 10832290
[patent_doc_number] => 08860466
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-10-14
[patent_title] => 'Electronic device and methode for implementing logic functions and for guiding charged particles'
[patent_app_type] => utility
[patent_app_number] => 13/980891
[patent_app_country] => US
[patent_app_date] => 2012-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 6834
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13980891
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/980891 | Electronic device and methode for implementing logic functions and for guiding charged particles | Jan 23, 2012 | Issued |
Array
(
[id] => 8589537
[patent_doc_number] => RE043912
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2013-01-08
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => reissue
[patent_app_number] => 13/340130
[patent_app_country] => US
[patent_app_date] => 2011-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 11382
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13340130
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/340130 | Semiconductor integrated circuit | Dec 28, 2011 | Issued |
Array
(
[id] => 8584844
[patent_doc_number] => 20130003665
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-03
[patent_title] => 'Method And Apparatus For Selecting Enhanced Dedicated Channel Transport Format Combination In Cell_Fach State And Idle Mode'
[patent_app_type] => utility
[patent_app_number] => 13/338435
[patent_app_country] => US
[patent_app_date] => 2011-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3449
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13338435
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/338435 | Method and apparatus for selecting enhanced dedicated channel transport format combination in cell—fach state and idle mode | Dec 27, 2011 | Issued |
Array
(
[id] => 9332500
[patent_doc_number] => 20140059282
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-02-27
[patent_title] => 'HYBRID NANOTUBE/CMOS DYNAMICALLY RECONFIGURABLE ARCHITECTURE AND SYSTEM THEREFORE'
[patent_app_type] => utility
[patent_app_number] => 13/314155
[patent_app_country] => US
[patent_app_date] => 2011-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 14967
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13314155
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/314155 | Hybrid nanotube/CMOS dynamically reconfigurable architecture and system therefore | Dec 6, 2011 | Issued |
Array
(
[id] => 8050493
[patent_doc_number] => 20120074983
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-29
[patent_title] => 'Integrated Circuit with Configurable On-Die Termination'
[patent_app_type] => utility
[patent_app_number] => 13/312762
[patent_app_country] => US
[patent_app_date] => 2011-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3054
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0074/20120074983.pdf
[firstpage_image] =>[orig_patent_app_number] => 13312762
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/312762 | Integrated circuit with configurable on-die termination | Dec 5, 2011 | Issued |
Array
(
[id] => 9469911
[patent_doc_number] => 08723549
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-13
[patent_title] => 'Configurable IC having a routing fabric with storage elements'
[patent_app_type] => utility
[patent_app_number] => 13/311544
[patent_app_country] => US
[patent_app_date] => 2011-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 38
[patent_no_of_words] => 21865
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13311544
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/311544 | Configurable IC having a routing fabric with storage elements | Dec 4, 2011 | Issued |
Array
(
[id] => 8039641
[patent_doc_number] => 20120069559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-22
[patent_title] => 'LIGHTING MODULE'
[patent_app_type] => utility
[patent_app_number] => 13/300623
[patent_app_country] => US
[patent_app_date] => 2011-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 1575
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0069/20120069559.pdf
[firstpage_image] =>[orig_patent_app_number] => 13300623
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/300623 | LIGHTING MODULE | Nov 19, 2011 | Abandoned |