
Don P. Le
Examiner (ID: 5300, Phone: (571)272-1806 , Office: P/2844 )
| Most Active Art Unit | 2819 |
| Art Unit(s) | 2844, 2819 |
| Total Applications | 2669 |
| Issued Applications | 2528 |
| Pending Applications | 46 |
| Abandoned Applications | 99 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8203358
[patent_doc_number] => 08188766
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-05-29
[patent_title] => 'Self-contained systems including scalable and programmable divider architectures and methods for generating a frequency adjustable clock signal'
[patent_app_type] => utility
[patent_app_number] => 13/024633
[patent_app_country] => US
[patent_app_date] => 2011-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7431
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/188/08188766.pdf
[firstpage_image] =>[orig_patent_app_number] => 13024633
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/024633 | Self-contained systems including scalable and programmable divider architectures and methods for generating a frequency adjustable clock signal | Feb 9, 2011 | Issued |
Array
(
[id] => 7978975
[patent_doc_number] => 08072235
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-06
[patent_title] => 'Integrated circuit with configurable on-die termination'
[patent_app_type] => utility
[patent_app_number] => 13/023993
[patent_app_country] => US
[patent_app_date] => 2011-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3055
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/072/08072235.pdf
[firstpage_image] =>[orig_patent_app_number] => 13023993
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/023993 | Integrated circuit with configurable on-die termination | Feb 8, 2011 | Issued |
Array
(
[id] => 8258255
[patent_doc_number] => 08207757
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-06-26
[patent_title] => 'Nonvolatile CMOS-compatible logic circuits and related operating methods'
[patent_app_type] => utility
[patent_app_number] => 13/022231
[patent_app_country] => US
[patent_app_date] => 2011-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 10129
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13022231
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/022231 | Nonvolatile CMOS-compatible logic circuits and related operating methods | Feb 6, 2011 | Issued |
Array
(
[id] => 8470633
[patent_doc_number] => 08299815
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Reconfigurable semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 13/017878
[patent_app_country] => US
[patent_app_date] => 2011-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 6570
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13017878
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/017878 | Reconfigurable semiconductor integrated circuit | Jan 30, 2011 | Issued |
Array
(
[id] => 8166179
[patent_doc_number] => 08174284
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-05-08
[patent_title] => 'Repairable IO in an integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 13/014990
[patent_app_country] => US
[patent_app_date] => 2011-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6258
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/174/08174284.pdf
[firstpage_image] =>[orig_patent_app_number] => 13014990
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/014990 | Repairable IO in an integrated circuit | Jan 26, 2011 | Issued |
Array
(
[id] => 8116093
[patent_doc_number] => 08159267
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-04-17
[patent_title] => 'Semiconductor device, display device, and electronic device'
[patent_app_type] => utility
[patent_app_number] => 12/960709
[patent_app_country] => US
[patent_app_date] => 2010-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 101
[patent_no_of_words] => 43201
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/159/08159267.pdf
[firstpage_image] =>[orig_patent_app_number] => 12960709
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/960709 | Semiconductor device, display device, and electronic device | Dec 5, 2010 | Issued |
Array
(
[id] => 7776106
[patent_doc_number] => 08120384
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-21
[patent_title] => 'Multivalued logic circuit'
[patent_app_type] => utility
[patent_app_number] => 12/951914
[patent_app_country] => US
[patent_app_date] => 2010-11-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 4299
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/120/08120384.pdf
[firstpage_image] =>[orig_patent_app_number] => 12951914
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/951914 | Multivalued logic circuit | Nov 21, 2010 | Issued |
Array
(
[id] => 6004740
[patent_doc_number] => 20110057683
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-10
[patent_title] => 'DEFECT-AND-FAILURE-TOLERANT DEMULTIPLEXER USING SERIES REPLICATION AND ERROR-CONTROL ENCODING'
[patent_app_type] => utility
[patent_app_number] => 12/947585
[patent_app_country] => US
[patent_app_date] => 2010-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 9472
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0057/20110057683.pdf
[firstpage_image] =>[orig_patent_app_number] => 12947585
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/947585 | DEFECT-AND-FAILURE-TOLERANT DEMULTIPLEXER USING SERIES REPLICATION AND ERROR-CONTROL ENCODING | Nov 15, 2010 | Abandoned |
Array
(
[id] => 8446990
[patent_doc_number] => 08289047
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-16
[patent_title] => 'Architecture and interconnect scheme for programmable logic circuits'
[patent_app_type] => utility
[patent_app_number] => 12/943846
[patent_app_country] => US
[patent_app_date] => 2010-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 7087
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12943846
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/943846 | Architecture and interconnect scheme for programmable logic circuits | Nov 9, 2010 | Issued |
Array
(
[id] => 6068398
[patent_doc_number] => 20110043247
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-24
[patent_title] => 'IC OUTPUT SIGNAL PATH WITH SWITCH, BUS HOLDER, AND BUFFER'
[patent_app_type] => utility
[patent_app_number] => 12/940359
[patent_app_country] => US
[patent_app_date] => 2010-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 10989
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20110043247.pdf
[firstpage_image] =>[orig_patent_app_number] => 12940359
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/940359 | IC output signal path with switch, bus holder, and buffer | Nov 4, 2010 | Issued |
Array
(
[id] => 5949528
[patent_doc_number] => 20110031994
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-10
[patent_title] => 'ARCHITECTURE FOR LOCAL PROGRAMMING OF QUANTUM PROCESSOR ELEMENTS USING LATCHING QUBITS'
[patent_app_type] => utility
[patent_app_number] => 12/909682
[patent_app_country] => US
[patent_app_date] => 2010-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 10878
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0031/20110031994.pdf
[firstpage_image] =>[orig_patent_app_number] => 12909682
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/909682 | Architecture for local programming of quantum processor elements using latching qubits | Oct 20, 2010 | Issued |
Array
(
[id] => 8446988
[patent_doc_number] => 08289045
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-16
[patent_title] => 'Low-jitter high-frequency clock channel'
[patent_app_type] => utility
[patent_app_number] => 12/904524
[patent_app_country] => US
[patent_app_date] => 2010-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4637
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12904524
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/904524 | Low-jitter high-frequency clock channel | Oct 13, 2010 | Issued |
Array
(
[id] => 8356999
[patent_doc_number] => 20120212158
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-23
[patent_title] => 'ELECTRODE SYSTEM, IN PARTICULAR FOR GAS DISCHARGE LIGHT SOURCES'
[patent_app_type] => utility
[patent_app_number] => 13/503394
[patent_app_country] => US
[patent_app_date] => 2010-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4011
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13503394
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/503394 | Electrode system, in particular for gas discharge light sources | Sep 28, 2010 | Issued |
Array
(
[id] => 6200195
[patent_doc_number] => 20110062981
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-17
[patent_title] => 'DELIBERATE DESTRUCTION OF INTEGRATED CIRCUITS'
[patent_app_type] => utility
[patent_app_number] => 12/890436
[patent_app_country] => US
[patent_app_date] => 2010-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5900
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20110062981.pdf
[firstpage_image] =>[orig_patent_app_number] => 12890436
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/890436 | Deliberate destruction of integrated circuits | Sep 23, 2010 | Issued |
Array
(
[id] => 5953319
[patent_doc_number] => 20110034021
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-10
[patent_title] => 'PROGRAMMABLE THROUGH SILICON VIA'
[patent_app_type] => utility
[patent_app_number] => 12/885727
[patent_app_country] => US
[patent_app_date] => 2010-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 4662
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0034/20110034021.pdf
[firstpage_image] =>[orig_patent_app_number] => 12885727
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/885727 | Programmable through silicon via | Sep 19, 2010 | Issued |
Array
(
[id] => 8275364
[patent_doc_number] => 20120169238
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'COLOR CONTROL OF LIGHTING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/392881
[patent_app_country] => US
[patent_app_date] => 2010-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3031
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13392881
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/392881 | COLOR CONTROL OF LIGHTING SYSTEM | Sep 15, 2010 | Abandoned |
Array
(
[id] => 8239212
[patent_doc_number] => 20120147944
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-14
[patent_title] => 'HIGH RESOLUTION OUTPUT DRIVER'
[patent_app_type] => utility
[patent_app_number] => 13/391383
[patent_app_country] => US
[patent_app_date] => 2010-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 14419
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13391383
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/391383 | High resolution output driver | Sep 13, 2010 | Issued |
Array
(
[id] => 8249545
[patent_doc_number] => 20120153867
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-06-21
[patent_title] => 'LAMP UNIT WITH A PLURALITY OF LIGHT SOURCE AND TOGGLE REMOTE CONTROL METHOD FOR SELECTING A DRIVE SETTING THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 13/392886
[patent_app_country] => US
[patent_app_date] => 2010-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4498
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0153/20120153867.pdf
[firstpage_image] =>[orig_patent_app_number] => 13392886
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/392886 | Lamp unit with a plurality of light source and toggle remote control method for selecting a drive setting therefor | Sep 8, 2010 | Issued |
Array
(
[id] => 8299374
[patent_doc_number] => 20120181935
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-19
[patent_title] => 'WIRELESS CONTROLLER FOR LIGHTING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/394138
[patent_app_country] => US
[patent_app_date] => 2010-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5147
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13394138
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/394138 | Wireless controller for lighting system | Sep 2, 2010 | Issued |
Array
(
[id] => 8321662
[patent_doc_number] => 20120194070
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-08-02
[patent_title] => 'OPERATING AN ELECTRODELESS DISCHARGE LAMP'
[patent_app_type] => utility
[patent_app_number] => 13/394961
[patent_app_country] => US
[patent_app_date] => 2010-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 10505
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13394961
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/394961 | OPERATING AN ELECTRODELESS DISCHARGE LAMP | Sep 2, 2010 | Abandoned |