Don P. Le

Array ( [id] => 6413143 [patent_doc_number] => 20100141144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'Lamp Comprising a Base and at Least Light-Emitting Semiconductor Component' [patent_app_type] => utility [patent_app_number] => 12/519334 [patent_app_country] => US [patent_app_date] => 2007-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4333 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20100141144.pdf [firstpage_image] =>[orig_patent_app_number] => 12519334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5556093 [patent_doc_number] => 20090267670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-29 [patent_title] => 'CIRCUIT WITH PARALLEL FUNCTIONAL CIRCUITS WITH MULTI-PHASE CONTROL INPUTS' [patent_app_type] => utility [patent_app_number] => 12/518696 [patent_app_country] => US [patent_app_date] => 2007-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3801 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0267/20090267670.pdf [firstpage_image] =>[orig_patent_app_number] => 12518696 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 243826 [patent_doc_number] => 07589563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-15 [patent_title] => 'Device and method for voltage regulator with stable and fast response and low standby current' [patent_app_type] => utility [patent_app_number] => 11/951850 [patent_app_country] => US [patent_app_date] => 2007-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3916 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/589/07589563.pdf [firstpage_image] =>[orig_patent_app_number] => 11951850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 307939 [patent_doc_number] => 07532013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Semiconductor integrated circuit and measuring method of terminator resistor in the semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/951260 [patent_app_country] => US [patent_app_date] => 2007-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 6404 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/532/07532013.pdf [firstpage_image] =>[orig_patent_app_number] => 11951260 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 798284 [patent_doc_number] => 07427874 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-09-23 [patent_title] => 'Interface block architectures' [patent_app_type] => utility [patent_app_number] => 11/949454 [patent_app_country] => US [patent_app_date] => 2007-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3831 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/427/07427874.pdf [firstpage_image] =>[orig_patent_app_number] => 11949454 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 590459 [patent_doc_number] => 07443197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'Low leakage and data retention circuitry' [patent_app_type] => utility [patent_app_number] => 11/998725 [patent_app_country] => US [patent_app_date] => 2007-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7341 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/443/07443197.pdf [firstpage_image] =>[orig_patent_app_number] => 11998725 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5579161 [patent_doc_number] => 20090174507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-09 [patent_title] => 'ON-DIE TERMINATION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/943581 [patent_app_country] => US [patent_app_date] => 2007-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4468 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20090174507.pdf [firstpage_image] =>[orig_patent_app_number] => 11943581 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 572951 [patent_doc_number] => 07466163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-16 [patent_title] => 'Look-up table structure with embedded carry logic' [patent_app_type] => utility [patent_app_number] => 11/985830 [patent_app_country] => US [patent_app_date] => 2007-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 57 [patent_no_of_words] => 20350 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466163.pdf [firstpage_image] =>[orig_patent_app_number] => 11985830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 289596 [patent_doc_number] => 07548214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-16 [patent_title] => 'Dual-band dipole antenna' [patent_app_type] => utility [patent_app_number] => 11/979649 [patent_app_country] => US [patent_app_date] => 2007-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 3139 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/548/07548214.pdf [firstpage_image] =>[orig_patent_app_number] => 11979649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6550200 [patent_doc_number] => 20100045211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'BRIGHTNESS ADJUSTING DEVICE AND BRIGHTNESS ADJUSTING METHOD' [patent_app_type] => utility [patent_app_number] => 12/312190 [patent_app_country] => US [patent_app_date] => 2007-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6123 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20100045211.pdf [firstpage_image] =>[orig_patent_app_number] => 12312190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 260561 [patent_doc_number] => 07573291 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-08-11 [patent_title] => 'Programmable logic device with enhanced logic block architecture' [patent_app_type] => utility [patent_app_number] => 11/934711 [patent_app_country] => US [patent_app_date] => 2007-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 26 [patent_no_of_words] => 4139 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573291.pdf [firstpage_image] =>[orig_patent_app_number] => 11934711 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4757338 [patent_doc_number] => 20080309563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'Triple-band antenna and electronic device thereof' [patent_app_type] => utility [patent_app_number] => 11/979318 [patent_app_country] => US [patent_app_date] => 2007-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3857 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20080309563.pdf [firstpage_image] =>[orig_patent_app_number] => 11979318 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 816700 [patent_doc_number] => 07415690 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Apparatus and methods for multi-gate silicon-on-insulator transistors' [patent_app_type] => utility [patent_app_number] => 11/930105 [patent_app_country] => US [patent_app_date] => 2007-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 10189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/415/07415690.pdf [firstpage_image] =>[orig_patent_app_number] => 11930105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 278691 [patent_doc_number] => 07557771 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-07-07 [patent_title] => 'Wall-mounted antenna rail mast system' [patent_app_type] => utility [patent_app_number] => 11/978054 [patent_app_country] => US [patent_app_date] => 2007-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 2835 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/557/07557771.pdf [firstpage_image] =>[orig_patent_app_number] => 11978054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 814160 [patent_doc_number] => 07414436 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-08-19 [patent_title] => 'Limited switch dynamic logic cell based register' [patent_app_type] => utility [patent_app_number] => 11/877898 [patent_app_country] => US [patent_app_date] => 2007-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 12 [patent_no_of_words] => 4367 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/414/07414436.pdf [firstpage_image] =>[orig_patent_app_number] => 11877898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4830910 [patent_doc_number] => 20080129620 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'Installation assembly for a motor vehicle antenna' [patent_app_type] => utility [patent_app_number] => 11/977105 [patent_app_country] => US [patent_app_date] => 2007-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4204 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20080129620.pdf [firstpage_image] =>[orig_patent_app_number] => 11977105 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5583306 [patent_doc_number] => 20090102508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'Pulsed Dynamic Logic Environment Metric Measurement Circuit' [patent_app_type] => utility [patent_app_number] => 11/876100 [patent_app_country] => US [patent_app_date] => 2007-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3263 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20090102508.pdf [firstpage_image] =>[orig_patent_app_number] => 11876100 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 278684 [patent_doc_number] => 07557764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'Means for mounting a portable satellite antenna on a vehicle' [patent_app_type] => utility [patent_app_number] => 11/974145 [patent_app_country] => US [patent_app_date] => 2007-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 2641 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/557/07557764.pdf [firstpage_image] =>[orig_patent_app_number] => 11974145 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4953026 [patent_doc_number] => 20080186050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-07 [patent_title] => 'Impedance matching circuit, input-output circuit and semiconductor test apparatus' [patent_app_type] => utility [patent_app_number] => 11/973547 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6500 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20080186050.pdf [firstpage_image] =>[orig_patent_app_number] => 11973547 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 296559 [patent_doc_number] => 07541833 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-06-02 [patent_title] => 'Validating partial reconfiguration of an integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/973781 [patent_app_country] => US [patent_app_date] => 2007-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/541/07541833.pdf [firstpage_image] =>[orig_patent_app_number] => 11973781 [rel_patent_id] =>[rel_patent_doc_number] =>)