Search

Don P. Le

Examiner (ID: 5300, Phone: (571)272-1806 , Office: P/2844 )

Most Active Art Unit
2819
Art Unit(s)
2844, 2819
Total Applications
2669
Issued Applications
2528
Pending Applications
46
Abandoned Applications
99

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 331035 [patent_doc_number] => 07511534 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-03-31 [patent_title] => 'Circuits, devices, systems, and methods of operation for a linear output driver' [patent_app_type] => utility [patent_app_number] => 11/973022 [patent_app_country] => US [patent_app_date] => 2007-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6009 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/511/07511534.pdf [firstpage_image] =>[orig_patent_app_number] => 11973022 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/973022
Circuits, devices, systems, and methods of operation for a linear output driver Oct 4, 2007 Issued
Array ( [id] => 323164 [patent_doc_number] => 07518398 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-04-14 [patent_title] => 'Integrated circuit with through-die via interface for die stacking' [patent_app_type] => utility [patent_app_number] => 11/973062 [patent_app_country] => US [patent_app_date] => 2007-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6361 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/518/07518398.pdf [firstpage_image] =>[orig_patent_app_number] => 11973062 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/973062
Integrated circuit with through-die via interface for die stacking Oct 3, 2007 Issued
Array ( [id] => 307953 [patent_doc_number] => 07532027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-12 [patent_title] => 'Deliberate destruction of integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/864625 [patent_app_country] => US [patent_app_date] => 2007-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5824 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/532/07532027.pdf [firstpage_image] =>[orig_patent_app_number] => 11864625 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/864625
Deliberate destruction of integrated circuits Sep 27, 2007 Issued
Array ( [id] => 565711 [patent_doc_number] => 07471113 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-30 [patent_title] => 'Low crowbar current slew rate controlled driver' [patent_app_type] => utility [patent_app_number] => 11/859434 [patent_app_country] => US [patent_app_date] => 2007-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 10870 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/471/07471113.pdf [firstpage_image] =>[orig_patent_app_number] => 11859434 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/859434
Low crowbar current slew rate controlled driver Sep 20, 2007 Issued
Array ( [id] => 260558 [patent_doc_number] => 07573288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Dynamically adjusting operation of a circuit within a semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/856352 [patent_app_country] => US [patent_app_date] => 2007-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5275 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/573/07573288.pdf [firstpage_image] =>[orig_patent_app_number] => 11856352 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/856352
Dynamically adjusting operation of a circuit within a semiconductor device Sep 16, 2007 Issued
Array ( [id] => 4936836 [patent_doc_number] => 20080074150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'BI-DIRECTIONAL SIGNAL TRANSMISSION SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/856009 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5433 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20080074150.pdf [firstpage_image] =>[orig_patent_app_number] => 11856009 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/856009
Bi-directional signal transmission system Sep 13, 2007 Issued
Array ( [id] => 572975 [patent_doc_number] => 07466165 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-16 [patent_title] => 'Transmission gate multiplexer' [patent_app_type] => utility [patent_app_number] => 11/854604 [patent_app_country] => US [patent_app_date] => 2007-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3216 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/466/07466165.pdf [firstpage_image] =>[orig_patent_app_number] => 11854604 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/854604
Transmission gate multiplexer Sep 12, 2007 Issued
Array ( [id] => 821044 [patent_doc_number] => 07408379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Impedance calibration circuit and semiconductor device including the same' [patent_app_type] => utility [patent_app_number] => 11/853956 [patent_app_country] => US [patent_app_date] => 2007-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5521 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/408/07408379.pdf [firstpage_image] =>[orig_patent_app_number] => 11853956 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853956
Impedance calibration circuit and semiconductor device including the same Sep 11, 2007 Issued
Array ( [id] => 5567794 [patent_doc_number] => 20090251172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'SINGLE ELECTRON BASED FLEXIBLE MULTI-FUNCTIONAL LOGIC CIRCUIT AND THE TRANSISTOR THEREOF' [patent_app_type] => utility [patent_app_number] => 12/281846 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3185 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0251/20090251172.pdf [firstpage_image] =>[orig_patent_app_number] => 12281846 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/281846
Single electron based flexible multi-functional logic circuit and the transistor thereof Sep 10, 2007 Issued
Array ( [id] => 292883 [patent_doc_number] => 07545178 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Signal encoder and signal decoder' [patent_app_type] => utility [patent_app_number] => 11/853712 [patent_app_country] => US [patent_app_date] => 2007-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7405 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/545/07545178.pdf [firstpage_image] =>[orig_patent_app_number] => 11853712 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/853712
Signal encoder and signal decoder Sep 10, 2007 Issued
Array ( [id] => 6354530 [patent_doc_number] => 20100072900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'SYSTEM AND METHOD FOR GENERATING LIGHT BY COLOR MIXING' [patent_app_type] => utility [patent_app_number] => 12/439230 [patent_app_country] => US [patent_app_date] => 2007-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4778 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20100072900.pdf [firstpage_image] =>[orig_patent_app_number] => 12439230 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/439230
SYSTEM AND METHOD FOR GENERATING LIGHT BY COLOR MIXING Aug 28, 2007 Abandoned
Array ( [id] => 23710 [patent_doc_number] => 07800401 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-09-21 [patent_title] => 'Fracturable lookup table and logic element' [patent_app_type] => utility [patent_app_number] => 11/841727 [patent_app_country] => US [patent_app_date] => 2007-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6134 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/800/07800401.pdf [firstpage_image] =>[orig_patent_app_number] => 11841727 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/841727
Fracturable lookup table and logic element Aug 19, 2007 Issued
Array ( [id] => 575964 [patent_doc_number] => 07463058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-09 [patent_title] => 'Programmable array logic circuit employing non-volatile ferromagnetic memory cells' [patent_app_type] => utility [patent_app_number] => 11/889908 [patent_app_country] => US [patent_app_date] => 2007-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2255 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/463/07463058.pdf [firstpage_image] =>[orig_patent_app_number] => 11889908 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/889908
Programmable array logic circuit employing non-volatile ferromagnetic memory cells Aug 16, 2007 Issued
Array ( [id] => 7717604 [patent_doc_number] => 20120007509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'LIGHT HAVING AT LEAST ONE LED' [patent_app_type] => utility [patent_app_number] => 12/672701 [patent_app_country] => US [patent_app_date] => 2007-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1524 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007509.pdf [firstpage_image] =>[orig_patent_app_number] => 12672701 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/672701
Light having at least one LED Aug 9, 2007 Issued
Array ( [id] => 7742162 [patent_doc_number] => 08106592 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Method of driving a discharge lamp, driving arrangement, and projector system' [patent_app_type] => utility [patent_app_number] => 12/377029 [patent_app_country] => US [patent_app_date] => 2007-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7065 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/106/08106592.pdf [firstpage_image] =>[orig_patent_app_number] => 12377029 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/377029
Method of driving a discharge lamp, driving arrangement, and projector system Aug 6, 2007 Issued
Array ( [id] => 5358570 [patent_doc_number] => 20090033364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'INTEGRATED CIRCUIT DEVICE FOR RECEIVING DIFFERENTIAL AND SINGLE-ENDED SIGNALS' [patent_app_type] => utility [patent_app_number] => 11/833376 [patent_app_country] => US [patent_app_date] => 2007-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3338 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20090033364.pdf [firstpage_image] =>[orig_patent_app_number] => 11833376 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/833376
Integrated circuit device for receiving differential and single-ended signals Aug 2, 2007 Issued
Array ( [id] => 367120 [patent_doc_number] => 07479805 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-01-20 [patent_title] => 'Programmable differential signaling system' [patent_app_type] => utility [patent_app_number] => 11/888790 [patent_app_country] => US [patent_app_date] => 2007-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 5416 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/479/07479805.pdf [firstpage_image] =>[orig_patent_app_number] => 11888790 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/888790
Programmable differential signaling system Jul 31, 2007 Issued
Array ( [id] => 4649243 [patent_doc_number] => 20080036498 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'LOGIC CIRCUIT, SYSTEM FOR REDUCING A CLOCK SKEW, AND METHOD FOR REDUCING A CLOCK SKEW' [patent_app_type] => utility [patent_app_number] => 11/831648 [patent_app_country] => US [patent_app_date] => 2007-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4379 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20080036498.pdf [firstpage_image] =>[orig_patent_app_number] => 11831648 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/831648
Logic circuit, system for reducing a clock skew, and method for reducing a clock skew Jul 30, 2007 Issued
Array ( [id] => 824126 [patent_doc_number] => 07405600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-29 [patent_title] => 'Current mode logic-CMOS converter' [patent_app_type] => utility [patent_app_number] => 11/831348 [patent_app_country] => US [patent_app_date] => 2007-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3540 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/405/07405600.pdf [firstpage_image] =>[orig_patent_app_number] => 11831348 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/831348
Current mode logic-CMOS converter Jul 30, 2007 Issued
Array ( [id] => 5358574 [patent_doc_number] => 20090033368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-05 [patent_title] => 'LOGIC BLOCK, A MULTI-TRACK STANDARD CELL LIBRARY, A METHOD OF DESIGNING A LOGIC BLOCK AND AN ASIC EMPLOYING THE LOGIC BLOCK' [patent_app_type] => utility [patent_app_number] => 11/830696 [patent_app_country] => US [patent_app_date] => 2007-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3097 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20090033368.pdf [firstpage_image] =>[orig_patent_app_number] => 11830696 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/830696
Logic block, a multi-track standard cell library, a method of designing a logic block and an asic employing the logic block Jul 29, 2007 Issued
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