
Don P. Le
Examiner (ID: 5300, Phone: (571)272-1806 , Office: P/2844 )
| Most Active Art Unit | 2819 |
| Art Unit(s) | 2844, 2819 |
| Total Applications | 2669 |
| Issued Applications | 2528 |
| Pending Applications | 46 |
| Abandoned Applications | 99 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 878025
[patent_doc_number] => 07358763
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-15
[patent_title] => 'Driving method of an electric circuit'
[patent_app_type] => utility
[patent_app_number] => 11/275905
[patent_app_country] => US
[patent_app_date] => 2006-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 31
[patent_no_of_words] => 4982
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/358/07358763.pdf
[firstpage_image] =>[orig_patent_app_number] => 11275905
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/275905 | Driving method of an electric circuit | Feb 1, 2006 | Issued |
Array
(
[id] => 5698002
[patent_doc_number] => 20060214686
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-28
[patent_title] => 'Level shifting circuit and display element driving circuit using same'
[patent_app_type] => utility
[patent_app_number] => 11/341611
[patent_app_country] => US
[patent_app_date] => 2006-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9968
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0214/20060214686.pdf
[firstpage_image] =>[orig_patent_app_number] => 11341611
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/341611 | Level shifting circuit and display element driving circuit using same | Jan 29, 2006 | Issued |
Array
(
[id] => 371996
[patent_doc_number] => 07478232
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-01-13
[patent_title] => 'Reset detector'
[patent_app_type] => utility
[patent_app_number] => 11/337336
[patent_app_country] => US
[patent_app_date] => 2006-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 3441
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 32
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/478/07478232.pdf
[firstpage_image] =>[orig_patent_app_number] => 11337336
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/337336 | Reset detector | Jan 22, 2006 | Issued |
Array
(
[id] => 5186476
[patent_doc_number] => 20070164784
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'Modular I/O bank architecture'
[patent_app_type] => utility
[patent_app_number] => 11/337046
[patent_app_country] => US
[patent_app_date] => 2006-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4361
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20070164784.pdf
[firstpage_image] =>[orig_patent_app_number] => 11337046
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/337046 | Modular I/O bank architecture | Jan 18, 2006 | Abandoned |
Array
(
[id] => 583752
[patent_doc_number] => 07456648
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-11-25
[patent_title] => 'Differential amplifiers using asymmetric transfer characteristics to suppress input noise in output logic signals'
[patent_app_type] => utility
[patent_app_number] => 11/330047
[patent_app_country] => US
[patent_app_date] => 2006-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7458
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/456/07456648.pdf
[firstpage_image] =>[orig_patent_app_number] => 11330047
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/330047 | Differential amplifiers using asymmetric transfer characteristics to suppress input noise in output logic signals | Jan 9, 2006 | Issued |
Array
(
[id] => 415762
[patent_doc_number] => 07279948
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-10-09
[patent_title] => 'Schmidt trigger circuit having sensitivity adjusting function and semiconductor device including the same'
[patent_app_type] => utility
[patent_app_number] => 11/326288
[patent_app_country] => US
[patent_app_date] => 2006-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 5752
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/279/07279948.pdf
[firstpage_image] =>[orig_patent_app_number] => 11326288
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/326288 | Schmidt trigger circuit having sensitivity adjusting function and semiconductor device including the same | Jan 5, 2006 | Issued |
Array
(
[id] => 4757145
[patent_doc_number] => 20080309370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-18
[patent_title] => 'Reprogrammable Integrated Circuit'
[patent_app_type] => utility
[patent_app_number] => 11/794335
[patent_app_country] => US
[patent_app_date] => 2006-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8355
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0309/20080309370.pdf
[firstpage_image] =>[orig_patent_app_number] => 11794335
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/794335 | Reprogrammable integrated circuit | Jan 5, 2006 | Issued |
Array
(
[id] => 5001431
[patent_doc_number] => 20070044065
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-22
[patent_title] => 'Reconfigurable integrated circuit device for automatic construction of initialization circuit'
[patent_app_type] => utility
[patent_app_number] => 11/325410
[patent_app_country] => US
[patent_app_date] => 2006-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4981
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20070044065.pdf
[firstpage_image] =>[orig_patent_app_number] => 11325410
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/325410 | Reconfigurable integrated circuit device for automatic construction of initialization circuit | Jan 4, 2006 | Issued |
Array
(
[id] => 926038
[patent_doc_number] => 07317336
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-08
[patent_title] => 'Impedance matching circuit, input-output circuit and semiconductor test apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/326182
[patent_app_country] => US
[patent_app_date] => 2006-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 6600
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/317/07317336.pdf
[firstpage_image] =>[orig_patent_app_number] => 11326182
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/326182 | Impedance matching circuit, input-output circuit and semiconductor test apparatus | Jan 4, 2006 | Issued |
Array
(
[id] => 345646
[patent_doc_number] => 07498836
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2009-03-03
[patent_title] => 'Programmable low power modes for embedded memory blocks'
[patent_app_type] => utility
[patent_app_number] => 11/325888
[patent_app_country] => US
[patent_app_date] => 2006-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 9571
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/498/07498836.pdf
[firstpage_image] =>[orig_patent_app_number] => 11325888
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/325888 | Programmable low power modes for embedded memory blocks | Jan 3, 2006 | Issued |
Array
(
[id] => 5629284
[patent_doc_number] => 20060145752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-06
[patent_title] => 'Control circuit and method'
[patent_app_type] => utility
[patent_app_number] => 11/324295
[patent_app_country] => US
[patent_app_date] => 2006-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6722
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0145/20060145752.pdf
[firstpage_image] =>[orig_patent_app_number] => 11324295
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/324295 | Control circuit and method | Jan 3, 2006 | Issued |
Array
(
[id] => 4986524
[patent_doc_number] => 20070152862
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-05
[patent_title] => 'Modular ASIC with crosspoint switch'
[patent_app_type] => utility
[patent_app_number] => 11/323696
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3564
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20070152862.pdf
[firstpage_image] =>[orig_patent_app_number] => 11323696
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323696 | Modular ASIC with crosspoint switch | Dec 29, 2005 | Issued |
Array
(
[id] => 178474
[patent_doc_number] => 07656184
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-02
[patent_title] => 'Detecting counterfeit products'
[patent_app_type] => utility
[patent_app_number] => 11/322677
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3685
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 35
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/656/07656184.pdf
[firstpage_image] =>[orig_patent_app_number] => 11322677
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/322677 | Detecting counterfeit products | Dec 29, 2005 | Issued |
Array
(
[id] => 394469
[patent_doc_number] => 07298170
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-11-20
[patent_title] => 'Safety system based on reconfigurable array of logic gates'
[patent_app_type] => utility
[patent_app_number] => 11/323719
[patent_app_country] => US
[patent_app_date] => 2005-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2575
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/298/07298170.pdf
[firstpage_image] =>[orig_patent_app_number] => 11323719
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323719 | Safety system based on reconfigurable array of logic gates | Dec 29, 2005 | Issued |
Array
(
[id] => 926039
[patent_doc_number] => 07317337
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-08
[patent_title] => 'Output driver in semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/323584
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2276
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/317/07317337.pdf
[firstpage_image] =>[orig_patent_app_number] => 11323584
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/323584 | Output driver in semiconductor device | Dec 28, 2005 | Issued |
Array
(
[id] => 926030
[patent_doc_number] => 07317328
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-01-08
[patent_title] => 'Test device for on die termination'
[patent_app_type] => utility
[patent_app_number] => 11/322283
[patent_app_country] => US
[patent_app_date] => 2005-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2797
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/317/07317328.pdf
[firstpage_image] =>[orig_patent_app_number] => 11322283
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/322283 | Test device for on die termination | Dec 28, 2005 | Issued |
Array
(
[id] => 824115
[patent_doc_number] => 07405589
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-29
[patent_title] => 'Apparatus and methods for power management in integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 11/316390
[patent_app_country] => US
[patent_app_date] => 2005-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 16
[patent_no_of_words] => 8698
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/405/07405589.pdf
[firstpage_image] =>[orig_patent_app_number] => 11316390
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/316390 | Apparatus and methods for power management in integrated circuits | Dec 21, 2005 | Issued |
Array
(
[id] => 6360929
[patent_doc_number] => 20100079084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-04-01
[patent_title] => 'DEVICE FOR SETTING LUMINOSITY OF LIGHT-EMITTING DIODES'
[patent_app_type] => utility
[patent_app_number] => 11/722068
[patent_app_country] => US
[patent_app_date] => 2005-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3611
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0079/20100079084.pdf
[firstpage_image] =>[orig_patent_app_number] => 11722068
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/722068 | Device for setting luminosity of light-emitting diodes | Dec 19, 2005 | Issued |
Array
(
[id] => 532006
[patent_doc_number] => 07183800
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2007-02-27
[patent_title] => 'Apparatus and methods for programmable logic devices with improved performance characteristics'
[patent_app_type] => utility
[patent_app_number] => 11/302938
[patent_app_country] => US
[patent_app_date] => 2005-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3929
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/183/07183800.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302938
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302938 | Apparatus and methods for programmable logic devices with improved performance characteristics | Dec 13, 2005 | Issued |
Array
(
[id] => 5809250
[patent_doc_number] => 20060095605
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-04
[patent_title] => 'Programmable logic device with high speed serial interface circuitry'
[patent_app_type] => utility
[patent_app_number] => 11/302722
[patent_app_country] => US
[patent_app_date] => 2005-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 10195
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0095/20060095605.pdf
[firstpage_image] =>[orig_patent_app_number] => 11302722
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/302722 | Programmable logic device with high speed serial interface circuitry | Dec 12, 2005 | Issued |