
Donald L. Monin Jr.
Examiner (ID: 17347)
| Most Active Art Unit | 2503 |
| Art Unit(s) | 2503, 2899, 2814 |
| Total Applications | 699 |
| Issued Applications | 545 |
| Pending Applications | 12 |
| Abandoned Applications | 142 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3594825
[patent_doc_number] => 05567985
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Electronic apparatus with compliant metal chip-substrate bonding layer(s)'
[patent_app_type] => 1
[patent_app_number] => 8/457551
[patent_app_country] => US
[patent_app_date] => 1995-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2343
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/567/05567985.pdf
[firstpage_image] =>[orig_patent_app_number] => 457551
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/457551 | Electronic apparatus with compliant metal chip-substrate bonding layer(s) | May 31, 1995 | Issued |
Array
(
[id] => 3666491
[patent_doc_number] => 05625203
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-29
[patent_title] => 'Controlled turn-off power semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/451994
[patent_app_country] => US
[patent_app_date] => 1995-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3576
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 306
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/625/05625203.pdf
[firstpage_image] =>[orig_patent_app_number] => 451994
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/451994 | Controlled turn-off power semiconductor device | May 25, 1995 | Issued |
| 08/448920 | NOISE ELIMINATING ELEMENT AND ELECTRICAL CIRCUIT HAVING THE SAME | May 24, 1995 | Abandoned |
Array
(
[id] => 3595889
[patent_doc_number] => 05488248
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-30
[patent_title] => 'Memory integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 8/446091
[patent_app_country] => US
[patent_app_date] => 1995-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 1625
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/488/05488248.pdf
[firstpage_image] =>[orig_patent_app_number] => 446091
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/446091 | Memory integrated circuit | May 18, 1995 | Issued |
Array
(
[id] => 3556425
[patent_doc_number] => 05493133
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-20
[patent_title] => 'PNP punchthrough-assisted protection device for special applications in CMOS technologies'
[patent_app_type] => 1
[patent_app_number] => 8/443032
[patent_app_country] => US
[patent_app_date] => 1995-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 1936
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/493/05493133.pdf
[firstpage_image] =>[orig_patent_app_number] => 443032
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/443032 | PNP punchthrough-assisted protection device for special applications in CMOS technologies | May 16, 1995 | Issued |
Array
(
[id] => 3693988
[patent_doc_number] => 05604355
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-18
[patent_title] => 'Electron tube comprising a semiconductor cathode'
[patent_app_type] => 1
[patent_app_number] => 8/442565
[patent_app_country] => US
[patent_app_date] => 1995-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 4344
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/604/05604355.pdf
[firstpage_image] =>[orig_patent_app_number] => 442565
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/442565 | Electron tube comprising a semiconductor cathode | May 15, 1995 | Issued |
Array
(
[id] => 3553443
[patent_doc_number] => 05548141
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-20
[patent_title] => 'Bipolar transistor having a self emitter contact aligned'
[patent_app_type] => 1
[patent_app_number] => 8/441847
[patent_app_country] => US
[patent_app_date] => 1995-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 1914
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/548/05548141.pdf
[firstpage_image] =>[orig_patent_app_number] => 441847
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/441847 | Bipolar transistor having a self emitter contact aligned | May 15, 1995 | Issued |
Array
(
[id] => 3553667
[patent_doc_number] => 05548157
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-20
[patent_title] => 'Semiconductor device capable of increasing reliability'
[patent_app_type] => 1
[patent_app_number] => 8/441573
[patent_app_country] => US
[patent_app_date] => 1995-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 11
[patent_no_of_words] => 2350
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/548/05548157.pdf
[firstpage_image] =>[orig_patent_app_number] => 441573
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/441573 | Semiconductor device capable of increasing reliability | May 14, 1995 | Issued |
| 08/442264 | BI-LEVEL DIGIT LINE ARCHITECTURE FOR HIGH-DENSITY DRAMS | May 14, 1995 | Abandoned |
Array
(
[id] => 3511356
[patent_doc_number] => 05569963
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-29
[patent_title] => 'Preformed planar structures for semiconductor device assemblies'
[patent_app_type] => 1
[patent_app_number] => 8/428323
[patent_app_country] => US
[patent_app_date] => 1995-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 36
[patent_no_of_words] => 15322
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/569/05569963.pdf
[firstpage_image] =>[orig_patent_app_number] => 428323
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/428323 | Preformed planar structures for semiconductor device assemblies | Apr 24, 1995 | Issued |
Array
(
[id] => 3498489
[patent_doc_number] => 05508539
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-16
[patent_title] => 'Elevated-gate field effect transistor structure and fabrication method'
[patent_app_type] => 1
[patent_app_number] => 8/425733
[patent_app_country] => US
[patent_app_date] => 1995-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3880
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/508/05508539.pdf
[firstpage_image] =>[orig_patent_app_number] => 425733
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/425733 | Elevated-gate field effect transistor structure and fabrication method | Apr 19, 1995 | Issued |
| 08/419503 | UNI-DIRECTIONAL FLASH DEVICE | Apr 9, 1995 | Abandoned |
Array
(
[id] => 3583679
[patent_doc_number] => 05491353
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-13
[patent_title] => 'Configurable cellular array'
[patent_app_type] => 1
[patent_app_number] => 8/416434
[patent_app_country] => US
[patent_app_date] => 1995-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 23
[patent_no_of_words] => 7425
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/491/05491353.pdf
[firstpage_image] =>[orig_patent_app_number] => 416434
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/416434 | Configurable cellular array | Mar 30, 1995 | Issued |
Array
(
[id] => 3524093
[patent_doc_number] => 05530280
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Process for producing crackstops on semiconductor devices and devices containing the crackstops'
[patent_app_type] => 1
[patent_app_number] => 8/414889
[patent_app_country] => US
[patent_app_date] => 1995-03-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 25
[patent_no_of_words] => 4562
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 41
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/530/05530280.pdf
[firstpage_image] =>[orig_patent_app_number] => 414889
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/414889 | Process for producing crackstops on semiconductor devices and devices containing the crackstops | Mar 30, 1995 | Issued |
Array
(
[id] => 3537869
[patent_doc_number] => 05557127
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-17
[patent_title] => 'Termination structure for mosgated device with reduced mask count and process for its manufacture'
[patent_app_type] => 1
[patent_app_number] => 8/409347
[patent_app_country] => US
[patent_app_date] => 1995-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2241
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 287
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/557/05557127.pdf
[firstpage_image] =>[orig_patent_app_number] => 409347
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/409347 | Termination structure for mosgated device with reduced mask count and process for its manufacture | Mar 22, 1995 | Issued |
Array
(
[id] => 3461377
[patent_doc_number] => 05473169
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-05
[patent_title] => 'Complementary-SCR electrostatic discharge protection circuit'
[patent_app_type] => 1
[patent_app_number] => 8/406170
[patent_app_country] => US
[patent_app_date] => 1995-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3898
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 358
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/473/05473169.pdf
[firstpage_image] =>[orig_patent_app_number] => 406170
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/406170 | Complementary-SCR electrostatic discharge protection circuit | Mar 16, 1995 | Issued |
Array
(
[id] => 3606567
[patent_doc_number] => 05578842
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-26
[patent_title] => 'Charge coupled device image sensor'
[patent_app_type] => 1
[patent_app_number] => 8/405375
[patent_app_country] => US
[patent_app_date] => 1995-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 3577
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/578/05578842.pdf
[firstpage_image] =>[orig_patent_app_number] => 405375
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/405375 | Charge coupled device image sensor | Mar 14, 1995 | Issued |
Array
(
[id] => 3698418
[patent_doc_number] => 05650642
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-22
[patent_title] => 'Field effect semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/400651
[patent_app_country] => US
[patent_app_date] => 1995-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 10085
[patent_no_of_claims] => 23
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[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/650/05650642.pdf
[firstpage_image] =>[orig_patent_app_number] => 400651
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/400651 | Field effect semiconductor device | Mar 7, 1995 | Issued |
Array
(
[id] => 3553656
[patent_doc_number] => 05548156
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-20
[patent_title] => 'Method and apparatus for SOI transistor'
[patent_app_type] => 1
[patent_app_number] => 8/400447
[patent_app_country] => US
[patent_app_date] => 1995-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 55
[patent_no_of_words] => 9549
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 190
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/548/05548156.pdf
[firstpage_image] =>[orig_patent_app_number] => 400447
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/400447 | Method and apparatus for SOI transistor | Mar 6, 1995 | Issued |
Array
(
[id] => 3509452
[patent_doc_number] => 05514903
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-07
[patent_title] => 'Compound semiconductor single-crystalline substrate for liquid phase epitaxial growth'
[patent_app_type] => 1
[patent_app_number] => 8/400271
[patent_app_country] => US
[patent_app_date] => 1995-03-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2626
[patent_no_of_claims] => 19
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/514/05514903.pdf
[firstpage_image] =>[orig_patent_app_number] => 400271
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/400271 | Compound semiconductor single-crystalline substrate for liquid phase epitaxial growth | Mar 2, 1995 | Issued |