| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2828156
[patent_doc_number] => 05168346
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-01
[patent_title] => 'Method and apparatus for isolation of flux materials in flip-chip manufacturing'
[patent_app_type] => 1
[patent_app_number] => 7/775009
[patent_app_country] => US
[patent_app_date] => 1991-10-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/168/05168346.pdf
[firstpage_image] =>[orig_patent_app_number] => 775009
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/775009 | Method and apparatus for isolation of flux materials in flip-chip manufacturing | Oct 10, 1991 | Issued |
Array
(
[id] => 3493637
[patent_doc_number] => 05471077
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-28
[patent_title] => 'High electron mobility transistor and methode of making'
[patent_app_type] => 1
[patent_app_number] => 7/774503
[patent_app_country] => US
[patent_app_date] => 1991-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/05/471/05471077.pdf
[firstpage_image] =>[orig_patent_app_number] => 774503
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/774503 | High electron mobility transistor and methode of making | Oct 9, 1991 | Issued |
| 07/763483 | SEMICONDUCTOR MEMORY DEVICE HAVING STACKED TRENCH CAPACITORS AND IMPROVED INTERCELL ISOLATION AND MANUFACTURING METHOD THEREFOR | Sep 22, 1991 | Abandoned |
Array
(
[id] => 2899348
[patent_doc_number] => 05241197
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-31
[patent_title] => 'Transistor provided with strained germanium layer'
[patent_app_type] => 1
[patent_app_number] => 7/759772
[patent_app_country] => US
[patent_app_date] => 1991-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 29
[patent_no_of_words] => 7734
[patent_no_of_claims] => 22
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[patent_words_short_claim] => 123
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/241/05241197.pdf
[firstpage_image] =>[orig_patent_app_number] => 759772
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/759772 | Transistor provided with strained germanium layer | Sep 12, 1991 | Issued |
Array
(
[id] => 3024964
[patent_doc_number] => 05289032
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-02-22
[patent_title] => 'Tape automated bonding(tab)semiconductor device and method for making the same'
[patent_app_type] => 1
[patent_app_number] => 7/745655
[patent_app_country] => US
[patent_app_date] => 1991-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3799
[patent_no_of_claims] => 12
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[pdf_file] => patents/05/289/05289032.pdf
[firstpage_image] =>[orig_patent_app_number] => 745655
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/745655 | Tape automated bonding(tab)semiconductor device and method for making the same | Aug 15, 1991 | Issued |
Array
(
[id] => 2811727
[patent_doc_number] => 05115294
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-05-19
[patent_title] => 'Optoelectronic integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 7/746308
[patent_app_country] => US
[patent_app_date] => 1991-08-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/05/115/05115294.pdf
[firstpage_image] =>[orig_patent_app_number] => 746308
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/746308 | Optoelectronic integrated circuit | Aug 13, 1991 | Issued |
Array
(
[id] => 2926345
[patent_doc_number] => 05200640
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-06
[patent_title] => 'Hermetic package having covers and a base providing for direct electrical connection'
[patent_app_type] => 1
[patent_app_number] => 7/743986
[patent_app_country] => US
[patent_app_date] => 1991-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/200/05200640.pdf
[firstpage_image] =>[orig_patent_app_number] => 743986
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/743986 | Hermetic package having covers and a base providing for direct electrical connection | Aug 11, 1991 | Issued |
Array
(
[id] => 2925081
[patent_doc_number] => 05235204
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-08-10
[patent_title] => 'Reverse self-aligned transistor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 7/742369
[patent_app_country] => US
[patent_app_date] => 1991-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 3466
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 207
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/235/05235204.pdf
[firstpage_image] =>[orig_patent_app_number] => 742369
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/742369 | Reverse self-aligned transistor integrated circuit | Aug 7, 1991 | Issued |
Array
(
[id] => 2984041
[patent_doc_number] => 05225896
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-07-06
[patent_title] => 'Protection element and method of manufacturing same'
[patent_app_type] => 1
[patent_app_number] => 7/741983
[patent_app_country] => US
[patent_app_date] => 1991-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 3072
[patent_no_of_claims] => 7
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/225/05225896.pdf
[firstpage_image] =>[orig_patent_app_number] => 741983
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/741983 | Protection element and method of manufacturing same | Aug 5, 1991 | Issued |
Array
(
[id] => 3068545
[patent_doc_number] => 05311048
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-05-10
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => 1
[patent_app_number] => 7/738133
[patent_app_country] => US
[patent_app_date] => 1991-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/05/311/05311048.pdf
[firstpage_image] =>[orig_patent_app_number] => 738133
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/738133 | Semiconductor integrated circuit device | Jul 30, 1991 | Issued |
Array
(
[id] => 3075787
[patent_doc_number] => 05336922
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-08-09
[patent_title] => 'Device comprising lower and upper silicon layers as capacitor electrodes and method of manufacturing such devices'
[patent_app_type] => 1
[patent_app_number] => 7/738426
[patent_app_country] => US
[patent_app_date] => 1991-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 34
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[patent_no_of_claims] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/336/05336922.pdf
[firstpage_image] =>[orig_patent_app_number] => 738426
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/738426 | Device comprising lower and upper silicon layers as capacitor electrodes and method of manufacturing such devices | Jul 30, 1991 | Issued |
| 07/735237 | STRUCTURE AND METHOD OF MANUFACTURE FOR MOS FIELD EFFECT TRANSISTOR HAVING LIGHTLY DOPED DRAIN AND SOURCE DIFFUSION REGIONS | Jul 23, 1991 | Abandoned |
| 07/734669 | SUBMICRON JOSEPHSON JUNCTION AND METHOD FOR ITS FABRICATION | Jul 22, 1991 | Abandoned |
| 07/729662 | SEMICONDUCTOR DEVICE HAVING A SHORT GATE LENGTH | Jul 14, 1991 | Abandoned |
| 07/728927 | LEAD FRAME ASSEMBLY AND METHOD FOR WIRING SAME | Jul 11, 1991 | Abandoned |
Array
(
[id] => 3427478
[patent_doc_number] => 05459344
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-17
[patent_title] => 'Stacked capacitor type semiconductor memory device and manufacturing method thereof'
[patent_app_type] => 1
[patent_app_number] => 7/727783
[patent_app_country] => US
[patent_app_date] => 1991-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 47
[patent_no_of_words] => 5377
[patent_no_of_claims] => 5
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[pdf_file] => patents/05/459/05459344.pdf
[firstpage_image] =>[orig_patent_app_number] => 727783
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/727783 | Stacked capacitor type semiconductor memory device and manufacturing method thereof | Jul 9, 1991 | Issued |
| 07/724024 | INTERCONNECT FOR A SEMICONDUCTOR LOGIC DEVICE COMPRISING A TRENCH | Jun 30, 1991 | Abandoned |
| 07/719837 | PROCESS FOR FORMATION OF LDD TRANSISTOR, AND STRUCTURE THEREOF | Jun 23, 1991 | Abandoned |
Array
(
[id] => 2983839
[patent_doc_number] => 05204546
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-20
[patent_title] => 'Ratioed capacitances in integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/717731
[patent_app_country] => US
[patent_app_date] => 1991-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/204/05204546.pdf
[firstpage_image] =>[orig_patent_app_number] => 717731
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/717731 | Ratioed capacitances in integrated circuits | Jun 18, 1991 | Issued |
| 07/708824 | EPROM CELL USING TRENCH ISOLATION TO PROVIDE LEAK CURRENT IMMUNITY | May 28, 1991 | Abandoned |