
Donghee Kang
Examiner (ID: 6186)
| Most Active Art Unit | 2811 |
| Art Unit(s) | 2811 |
| Total Applications | 477 |
| Issued Applications | 396 |
| Pending Applications | 22 |
| Abandoned Applications | 59 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 09/354386 | METHOD OF CONSTRUCTING AN ULTRA-RUGGED BIOMETRIC I.C. | Jul 13, 1999 | Abandoned |
Array
(
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[patent_title] => 'Semiconductor device'
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Array
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[patent_title] => 'FLEXIBLE INTERCONNECTIONS WITH DUAL-METAL DUAL-STUD STRUCTURE'
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[patent_app_number] => 09/351440
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/351440 | Flexible interconnections with dual-metal dual-stud structure | Jul 11, 1999 | Issued |
Array
(
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[patent_issue_date] => 2004-01-27
[patent_title] => 'Semiconductor device with alternating conductivity type layer and method of manufacturing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/348915 | Semiconductor device with alternating conductivity type layer and method of manufacturing the same | Jul 6, 1999 | Issued |
Array
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[patent_issue_date] => 2001-11-27
[patent_title] => 'Container structure for floating gate memory device and method for forming same'
[patent_app_type] => 1
[patent_app_number] => 9/348725
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Array
(
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[patent_title] => 'Semiconductor device and method for fabricating same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/345945 | Semiconductor device and method for fabricating same | Jun 30, 1999 | Issued |
Array
(
[id] => 1509388
[patent_doc_number] => 06441451
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[patent_issue_date] => 2002-08-27
[patent_title] => 'Pressure transducer and manufacturing method thereof'
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[patent_app_number] => 09/342065
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/342065 | Pressure transducer and manufacturing method thereof | Jun 28, 1999 | Issued |
Array
(
[id] => 1419076
[patent_doc_number] => 06525373
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[patent_kind] => B1
[patent_issue_date] => 2003-02-25
[patent_title] => 'Power semiconductor device having trench gate structure and method for manufacturing the same'
[patent_app_type] => B1
[patent_app_number] => 09/340382
[patent_app_country] => US
[patent_app_date] => 1999-06-28
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[firstpage_image] =>[orig_patent_app_number] => 09340382
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/340382 | Power semiconductor device having trench gate structure and method for manufacturing the same | Jun 27, 1999 | Issued |
| 09/335646 | CMOD INTEGRATED CIRCUIT HAVING VERTICAL TRANSISTORS AND A PROCESS FOR FABRICATING SAME | Jun 17, 1999 | Abandoned |
Array
(
[id] => 1461440
[patent_doc_number] => 06392272
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[patent_issue_date] => 2002-05-21
[patent_title] => 'Insulating gate type semiconductor device'
[patent_app_type] => B1
[patent_app_number] => 09/314115
[patent_app_country] => US
[patent_app_date] => 1999-05-19
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[firstpage_image] =>[orig_patent_app_number] => 09314115
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/314115 | Insulating gate type semiconductor device | May 18, 1999 | Issued |
Array
(
[id] => 1597091
[patent_doc_number] => 06384450
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[patent_issue_date] => 2002-05-07
[patent_title] => 'Semiconductor memory device and method of manufacturing the same'
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[patent_app_number] => 09/304605
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/304605 | Semiconductor memory device and method of manufacturing the same | May 3, 1999 | Issued |
Array
(
[id] => 4414001
[patent_doc_number] => 06229162
[patent_country] => US
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[patent_issue_date] => 2001-05-08
[patent_title] => 'Planar-type avalanche photodiode'
[patent_app_type] => 1
[patent_app_number] => 9/294085
[patent_app_country] => US
[patent_app_date] => 1999-04-19
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[firstpage_image] =>[orig_patent_app_number] => 294085
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/294085 | Planar-type avalanche photodiode | Apr 18, 1999 | Issued |
Array
(
[id] => 4282469
[patent_doc_number] => 06281550
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[patent_issue_date] => 2001-08-28
[patent_title] => 'Transistor and logic circuit of thin silicon-on-insulator wafers based on gate induced drain leakage currents'
[patent_app_type] => 1
[patent_app_number] => 9/286946
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/286946 | Transistor and logic circuit of thin silicon-on-insulator wafers based on gate induced drain leakage currents | Apr 7, 1999 | Issued |
Array
(
[id] => 1363997
[patent_doc_number] => 06573534
[patent_country] => US
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[patent_issue_date] => 2003-06-03
[patent_title] => 'Silicon carbide semiconductor device'
[patent_app_type] => B1
[patent_app_number] => 09/265582
[patent_app_country] => US
[patent_app_date] => 1999-03-10
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[firstpage_image] =>[orig_patent_app_number] => 09265582
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/265582 | Silicon carbide semiconductor device | Mar 9, 1999 | Issued |
Array
(
[id] => 4390228
[patent_doc_number] => 06262485
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-17
[patent_title] => 'Using implants to lower anneal temperatures'
[patent_app_type] => 1
[patent_app_number] => 9/258465
[patent_app_country] => US
[patent_app_date] => 1999-02-26
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[firstpage_image] =>[orig_patent_app_number] => 258465
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/258465 | Using implants to lower anneal temperatures | Feb 25, 1999 | Issued |
| 09/235765 | HETEROJUNCTION BIPOLAR TRANSISTOR AND ITS FABRICATION METHOD | Jan 24, 1999 | Abandoned |
Array
(
[id] => 1491791
[patent_doc_number] => 06417535
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[patent_issue_date] => 2002-07-09
[patent_title] => 'Vertical interdigitated metal-insulator-metal capacitor for an integrated circuit'
[patent_app_type] => B1
[patent_app_number] => 09/219655
[patent_app_country] => US
[patent_app_date] => 1998-12-23
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[pdf_file] => patents/06/417/06417535.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/219655 | Vertical interdigitated metal-insulator-metal capacitor for an integrated circuit | Dec 22, 1998 | Issued |
Array
(
[id] => 4387254
[patent_doc_number] => 06294810
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[patent_issue_date] => 2001-09-25
[patent_title] => 'EEPROM cell with tunneling at separate edge and channel regions'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/218987 | EEPROM cell with tunneling at separate edge and channel regions | Dec 21, 1998 | Issued |
Array
(
[id] => 4414089
[patent_doc_number] => 06229169
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[patent_kind] => NA
[patent_issue_date] => 2001-05-08
[patent_title] => 'Memory cell configuration, method for fabricating it and methods for operating it'
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[patent_app_number] => 9/213724
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[pdf_file] => patents/06/229/06229169.pdf
[firstpage_image] =>[orig_patent_app_number] => 213724
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/213724 | Memory cell configuration, method for fabricating it and methods for operating it | Dec 16, 1998 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/210540 | Semiconductor device | Dec 13, 1998 | Issued |