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Donghee Kang

Examiner (ID: 6186)

Most Active Art Unit
2811
Art Unit(s)
2811
Total Applications
477
Issued Applications
396
Pending Applications
22
Abandoned Applications
59

Applications

Application numberTitle of the applicationFiling DateStatus
09/354386 METHOD OF CONSTRUCTING AN ULTRA-RUGGED BIOMETRIC I.C. Jul 13, 1999 Abandoned
Array ( [id] => 1563100 [patent_doc_number] => 06362514 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/352340 [patent_app_country] => US [patent_app_date] => 1999-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5060 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362514.pdf [firstpage_image] =>[orig_patent_app_number] => 09352340 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/352340
Semiconductor device Jul 12, 1999 Issued
Array ( [id] => 6285004 [patent_doc_number] => 20020053716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-09 [patent_title] => 'FLEXIBLE INTERCONNECTIONS WITH DUAL-METAL DUAL-STUD STRUCTURE' [patent_app_type] => new [patent_app_number] => 09/351440 [patent_app_country] => US [patent_app_date] => 1999-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4145 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20020053716.pdf [firstpage_image] =>[orig_patent_app_number] => 09351440 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/351440
Flexible interconnections with dual-metal dual-stud structure Jul 11, 1999 Issued
Array ( [id] => 1241524 [patent_doc_number] => 06683347 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-27 [patent_title] => 'Semiconductor device with alternating conductivity type layer and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/348915 [patent_app_country] => US [patent_app_date] => 1999-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 27 [patent_no_of_words] => 9397 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683347.pdf [firstpage_image] =>[orig_patent_app_number] => 09348915 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/348915
Semiconductor device with alternating conductivity type layer and method of manufacturing the same Jul 6, 1999 Issued
Array ( [id] => 4277685 [patent_doc_number] => 06323514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Container structure for floating gate memory device and method for forming same' [patent_app_type] => 1 [patent_app_number] => 9/348725 [patent_app_country] => US [patent_app_date] => 1999-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2849 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/323/06323514.pdf [firstpage_image] =>[orig_patent_app_number] => 348725 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/348725
Container structure for floating gate memory device and method for forming same Jul 5, 1999 Issued
Array ( [id] => 4413620 [patent_doc_number] => 06310368 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Semiconductor device and method for fabricating same' [patent_app_type] => 1 [patent_app_number] => 9/345945 [patent_app_country] => US [patent_app_date] => 1999-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 28 [patent_no_of_words] => 6749 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310368.pdf [firstpage_image] =>[orig_patent_app_number] => 345945 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/345945
Semiconductor device and method for fabricating same Jun 30, 1999 Issued
Array ( [id] => 1509388 [patent_doc_number] => 06441451 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Pressure transducer and manufacturing method thereof' [patent_app_type] => B1 [patent_app_number] => 09/342065 [patent_app_country] => US [patent_app_date] => 1999-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 56 [patent_no_of_words] => 9948 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441451.pdf [firstpage_image] =>[orig_patent_app_number] => 09342065 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/342065
Pressure transducer and manufacturing method thereof Jun 28, 1999 Issued
Array ( [id] => 1419076 [patent_doc_number] => 06525373 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Power semiconductor device having trench gate structure and method for manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/340382 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3204 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/525/06525373.pdf [firstpage_image] =>[orig_patent_app_number] => 09340382 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340382
Power semiconductor device having trench gate structure and method for manufacturing the same Jun 27, 1999 Issued
09/335646 CMOD INTEGRATED CIRCUIT HAVING VERTICAL TRANSISTORS AND A PROCESS FOR FABRICATING SAME Jun 17, 1999 Abandoned
Array ( [id] => 1461440 [patent_doc_number] => 06392272 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Insulating gate type semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/314115 [patent_app_country] => US [patent_app_date] => 1999-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7608 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 399 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/392/06392272.pdf [firstpage_image] =>[orig_patent_app_number] => 09314115 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/314115
Insulating gate type semiconductor device May 18, 1999 Issued
Array ( [id] => 1597091 [patent_doc_number] => 06384450 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Semiconductor memory device and method of manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/304605 [patent_app_country] => US [patent_app_date] => 1999-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 6124 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384450.pdf [firstpage_image] =>[orig_patent_app_number] => 09304605 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/304605
Semiconductor memory device and method of manufacturing the same May 3, 1999 Issued
Array ( [id] => 4414001 [patent_doc_number] => 06229162 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Planar-type avalanche photodiode' [patent_app_type] => 1 [patent_app_number] => 9/294085 [patent_app_country] => US [patent_app_date] => 1999-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5064 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229162.pdf [firstpage_image] =>[orig_patent_app_number] => 294085 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/294085
Planar-type avalanche photodiode Apr 18, 1999 Issued
Array ( [id] => 4282469 [patent_doc_number] => 06281550 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Transistor and logic circuit of thin silicon-on-insulator wafers based on gate induced drain leakage currents' [patent_app_type] => 1 [patent_app_number] => 9/286946 [patent_app_country] => US [patent_app_date] => 1999-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 3623 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281550.pdf [firstpage_image] =>[orig_patent_app_number] => 286946 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/286946
Transistor and logic circuit of thin silicon-on-insulator wafers based on gate induced drain leakage currents Apr 7, 1999 Issued
Array ( [id] => 1363997 [patent_doc_number] => 06573534 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Silicon carbide semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/265582 [patent_app_country] => US [patent_app_date] => 1999-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 99 [patent_no_of_words] => 29441 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/573/06573534.pdf [firstpage_image] =>[orig_patent_app_number] => 09265582 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/265582
Silicon carbide semiconductor device Mar 9, 1999 Issued
Array ( [id] => 4390228 [patent_doc_number] => 06262485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Using implants to lower anneal temperatures' [patent_app_type] => 1 [patent_app_number] => 9/258465 [patent_app_country] => US [patent_app_date] => 1999-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 4092 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/262/06262485.pdf [firstpage_image] =>[orig_patent_app_number] => 258465 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/258465
Using implants to lower anneal temperatures Feb 25, 1999 Issued
09/235765 HETEROJUNCTION BIPOLAR TRANSISTOR AND ITS FABRICATION METHOD Jan 24, 1999 Abandoned
Array ( [id] => 1491791 [patent_doc_number] => 06417535 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Vertical interdigitated metal-insulator-metal capacitor for an integrated circuit' [patent_app_type] => B1 [patent_app_number] => 09/219655 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 35 [patent_no_of_words] => 8900 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/417/06417535.pdf [firstpage_image] =>[orig_patent_app_number] => 09219655 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/219655
Vertical interdigitated metal-insulator-metal capacitor for an integrated circuit Dec 22, 1998 Issued
Array ( [id] => 4387254 [patent_doc_number] => 06294810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'EEPROM cell with tunneling at separate edge and channel regions' [patent_app_type] => 1 [patent_app_number] => 9/218987 [patent_app_country] => US [patent_app_date] => 1998-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4670 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/294/06294810.pdf [firstpage_image] =>[orig_patent_app_number] => 218987 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/218987
EEPROM cell with tunneling at separate edge and channel regions Dec 21, 1998 Issued
Array ( [id] => 4414089 [patent_doc_number] => 06229169 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Memory cell configuration, method for fabricating it and methods for operating it' [patent_app_type] => 1 [patent_app_number] => 9/213724 [patent_app_country] => US [patent_app_date] => 1998-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 26 [patent_no_of_words] => 9100 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/229/06229169.pdf [firstpage_image] =>[orig_patent_app_number] => 213724 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/213724
Memory cell configuration, method for fabricating it and methods for operating it Dec 16, 1998 Issued
Array ( [id] => 1183039 [patent_doc_number] => 06737709 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-18 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/210540 [patent_app_country] => US [patent_app_date] => 1998-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4203 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/737/06737709.pdf [firstpage_image] =>[orig_patent_app_number] => 09210540 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/210540
Semiconductor device Dec 13, 1998 Issued
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