Donghee Kang

Array ( [id] => 1015740 [patent_doc_number] => 06894748 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-17 [patent_title] => 'Bump structure of a scattering reflective board and method for manufacturing the bump structure' [patent_app_type] => utility [patent_app_number] => 10/449416 [patent_app_country] => US [patent_app_date] => 2003-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2268 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894748.pdf [firstpage_image] =>[orig_patent_app_number] => 10449416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1043697 [patent_doc_number] => 06867130 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'Enhanced silicidation of polysilicon gate electrodes' [patent_app_type] => utility [patent_app_number] => 10/445936 [patent_app_country] => US [patent_app_date] => 2003-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2509 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867130.pdf [firstpage_image] =>[orig_patent_app_number] => 10445936 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7273010 [patent_doc_number] => 20040232461 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'SINGLE POLY-SI PROCESS FOR DRAM BY DEEP N WELL (NW) PLATE' [patent_app_type] => new [patent_app_number] => 10/444875 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5688 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20040232461.pdf [firstpage_image] =>[orig_patent_app_number] => 10444875 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7368524 [patent_doc_number] => 20040026713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Semiconductor device with high structural reliability and low parasitic capacitance' [patent_app_type] => new [patent_app_number] => 10/441096 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4813 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20040026713.pdf [firstpage_image] =>[orig_patent_app_number] => 10441096 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1031048 [patent_doc_number] => 06878600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-12 [patent_title] => 'Method for fabricating trench capacitors and semiconductor device with trench capacitors' [patent_app_type] => utility [patent_app_number] => 10/436426 [patent_app_country] => US [patent_app_date] => 2003-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 10334 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/878/06878600.pdf [firstpage_image] =>[orig_patent_app_number] => 10436426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1104796 [patent_doc_number] => 06812075 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-02 [patent_title] => 'Self-aligned dog-bone structure for FinFET applications and methods to fabricate the same' [patent_app_type] => B2 [patent_app_number] => 10/428705 [patent_app_country] => US [patent_app_date] => 2003-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 65 [patent_no_of_words] => 4779 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812075.pdf [firstpage_image] =>[orig_patent_app_number] => 10428705 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7627937 [patent_doc_number] => 06806500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-10-19 [patent_title] => 'Electro-optical device and electronic apparatus' [patent_app_type] => B2 [patent_app_number] => 10/427915 [patent_app_country] => US [patent_app_date] => 2003-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 10926 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/806/06806500.pdf [firstpage_image] =>[orig_patent_app_number] => 10427915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1136507 [patent_doc_number] => 06784513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-31 [patent_title] => 'Semiconductor light receiving device and electronic apparatus incorporating the same' [patent_app_type] => B2 [patent_app_number] => 10/421866 [patent_app_country] => US [patent_app_date] => 2003-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6181 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/784/06784513.pdf [firstpage_image] =>[orig_patent_app_number] => 10421866 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6768065 [patent_doc_number] => 20030214005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-20 [patent_title] => 'A-C:H ISFET device, manufacturing method, and testing methods and apparatus thereof' [patent_app_type] => new [patent_app_number] => 10/419735 [patent_app_country] => US [patent_app_date] => 2003-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5268 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20030214005.pdf [firstpage_image] =>[orig_patent_app_number] => 10419735 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1066147 [patent_doc_number] => 06847063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-01-25 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/413306 [patent_app_country] => US [patent_app_date] => 2003-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 6903 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/847/06847063.pdf [firstpage_image] =>[orig_patent_app_number] => 10413306 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7433340 [patent_doc_number] => 20040065875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/413305 [patent_app_country] => US [patent_app_date] => 2003-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8779 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20040065875.pdf [firstpage_image] =>[orig_patent_app_number] => 10413305 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7371374 [patent_doc_number] => 20040079944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-29 [patent_title] => 'Semiconductor device and manufacturing method for same' [patent_app_type] => new [patent_app_number] => 10/411145 [patent_app_country] => US [patent_app_date] => 2003-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20040079944.pdf [firstpage_image] =>[orig_patent_app_number] => 10411145 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7612872 [patent_doc_number] => 06902962 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-07 [patent_title] => 'Silicon-on-insulator chip with multiple crystal orientations' [patent_app_type] => utility [patent_app_number] => 10/408081 [patent_app_country] => US [patent_app_date] => 2003-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 28 [patent_no_of_words] => 4835 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/902/06902962.pdf [firstpage_image] =>[orig_patent_app_number] => 10408081 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1168744 [patent_doc_number] => 06753239 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-22 [patent_title] => 'Bond and back side etchback transistor fabrication process' [patent_app_type] => B1 [patent_app_number] => 10/407746 [patent_app_country] => US [patent_app_date] => 2003-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 8419 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/753/06753239.pdf [firstpage_image] =>[orig_patent_app_number] => 10407746 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6725275 [patent_doc_number] => 20030207587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Semiconductor constructions; and methods of forming semiconductor constructions' [patent_app_type] => new [patent_app_number] => 10/406755 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2926 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0207/20030207587.pdf [firstpage_image] =>[orig_patent_app_number] => 10406755 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1132310 [patent_doc_number] => 06787842 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'Method for operating a stacked gate field effect transistor (FET) device' [patent_app_type] => B1 [patent_app_number] => 10/406775 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 15 [patent_no_of_words] => 5314 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787842.pdf [firstpage_image] =>[orig_patent_app_number] => 10406775 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6662115 [patent_doc_number] => 20030201441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Semiconductor light emitting device and method for producing the same' [patent_app_type] => new [patent_app_number] => 10/405791 [patent_app_country] => US [patent_app_date] => 2003-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3299 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20030201441.pdf [firstpage_image] =>[orig_patent_app_number] => 10405791 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 999554 [patent_doc_number] => 06911404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Transistor element having an anisotropic high-k gate dielectric' [patent_app_type] => utility [patent_app_number] => 10/403556 [patent_app_country] => US [patent_app_date] => 2003-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 4225 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/911/06911404.pdf [firstpage_image] =>[orig_patent_app_number] => 10403556 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6727706 [patent_doc_number] => 20030183896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Epitaxially grown compound semiconductor film and compound semiconductor multi-layer structure' [patent_app_type] => new [patent_app_number] => 10/401215 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2512 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20030183896.pdf [firstpage_image] =>[orig_patent_app_number] => 10401215 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1034954 [patent_doc_number] => 06875997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-05 [patent_title] => 'Test patterns and methods of controlling CMP process using the same' [patent_app_type] => utility [patent_app_number] => 10/396595 [patent_app_country] => US [patent_app_date] => 2003-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 3804 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/875/06875997.pdf [firstpage_image] =>[orig_patent_app_number] => 10396595 [rel_patent_id] =>[rel_patent_doc_number] =>)