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Donnell Alan Long

Examiner (ID: 17144)

Most Active Art Unit
3754
Art Unit(s)
3754
Total Applications
1541
Issued Applications
1147
Pending Applications
109
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16373130 [patent_doc_number] => 10804904 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-13 [patent_title] => Apparatus and method for detecting synchronization loss in multi-lane transmitter [patent_app_type] => utility [patent_app_number] => 16/725580 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7880 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725580 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725580
Apparatus and method for detecting synchronization loss in multi-lane transmitter Dec 22, 2019 Issued
Array ( [id] => 16309332 [patent_doc_number] => 10778148 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-15 [patent_title] => Gain and sensitivity in a Gilbert switch stage [patent_app_type] => utility [patent_app_number] => 16/713422 [patent_app_country] => US [patent_app_date] => 2019-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2520 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16713422 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/713422
Gain and sensitivity in a Gilbert switch stage Dec 12, 2019 Issued
Array ( [id] => 17196641 [patent_doc_number] => 11165416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-02 [patent_title] => Duty cycle and skew measurement and correction for differential and single-ended clock signals [patent_app_type] => utility [patent_app_number] => 16/701844 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701844 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/701844
Duty cycle and skew measurement and correction for differential and single-ended clock signals Dec 2, 2019 Issued
Array ( [id] => 18913112 [patent_doc_number] => 11876100 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Array substrate and method of manufacturing the same, pixel driving method, and display panel [patent_app_type] => utility [patent_app_number] => 16/976530 [patent_app_country] => US [patent_app_date] => 2019-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 9085 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16976530 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/976530
Array substrate and method of manufacturing the same, pixel driving method, and display panel Nov 28, 2019 Issued
Array ( [id] => 16594414 [patent_doc_number] => 10903694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Wireless power transmission device [patent_app_type] => utility [patent_app_number] => 16/678373 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6314 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678373 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678373
Wireless power transmission device Nov 7, 2019 Issued
Array ( [id] => 17295297 [patent_doc_number] => 20210391136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => MONITORING AND TRIGGERING OF ELECTRICAL FUSES [patent_app_type] => utility [patent_app_number] => 17/288251 [patent_app_country] => US [patent_app_date] => 2019-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17288251 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/288251
Monitoring and triggering of electrical fuses Oct 21, 2019 Issued
Array ( [id] => 16765942 [patent_doc_number] => 20210111524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => Illuminated Power Strip Assembly [patent_app_type] => utility [patent_app_number] => 16/597190 [patent_app_country] => US [patent_app_date] => 2019-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16597190 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/597190
Illuminated power strip assembly Oct 8, 2019 Issued
Array ( [id] => 16264293 [patent_doc_number] => 10755734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Multi-signal realignment for changing sampling clock [patent_app_type] => utility [patent_app_number] => 16/570785 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570785 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570785
Multi-signal realignment for changing sampling clock Sep 12, 2019 Issued
Array ( [id] => 15271217 [patent_doc_number] => 20190384343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => LOW-VOLTAGE REFERENCE CURRENT CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/557808 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557808
Low-voltage reference current circuit Aug 29, 2019 Issued
Array ( [id] => 17498773 [patent_doc_number] => 11287474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Scan flip-flop and scan test circuit including the same [patent_app_type] => utility [patent_app_number] => 16/552109 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12761 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16552109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/552109
Scan flip-flop and scan test circuit including the same Aug 26, 2019 Issued
Array ( [id] => 15119711 [patent_doc_number] => 20190346488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => DISCRETE INPUT DETERMINING CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 16/522839 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16522839 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/522839
Discrete input determining circuit and method Jul 25, 2019 Issued
Array ( [id] => 15439451 [patent_doc_number] => 20200033909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => ZERO OFFSET CLOCK DISTRIBUTION [patent_app_type] => utility [patent_app_number] => 16/521217 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521217 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521217
Zero offset clock distribution Jul 23, 2019 Issued
Array ( [id] => 17145962 [patent_doc_number] => 20210313975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => BI-DIRECTIONAL ADAPTIVE CLOCKING CIRCUIT SUPPORTING A WIDE FREQUENCY RANGE [patent_app_type] => utility [patent_app_number] => 16/957724 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16957724 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/957724
Bi-directional adaptive clocking circuit supporting a wide frequency range Jul 8, 2019 Issued
Array ( [id] => 15124695 [patent_doc_number] => 20190348981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => SEMICONDUCTOR APPARATUS INCLUDING A POWER GATING CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/503101 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503101 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503101
Semiconductor apparatus including a power gating circuit Jul 2, 2019 Issued
Array ( [id] => 16339822 [patent_doc_number] => 10790794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-29 [patent_title] => Methods and apparatus for an interface [patent_app_type] => utility [patent_app_number] => 16/459849 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3902 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459849
Methods and apparatus for an interface Jul 1, 2019 Issued
Array ( [id] => 16646230 [patent_doc_number] => 10924102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Method for driving a transistor device and electronic circuit [patent_app_type] => utility [patent_app_number] => 16/460153 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 36 [patent_no_of_words] => 11232 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460153 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460153
Method for driving a transistor device and electronic circuit Jul 1, 2019 Issued
Array ( [id] => 16082503 [patent_doc_number] => 20200195238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => SYNCHRONIZER WITH CONTROLLED METASTABILITY CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 16/458239 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458239
Synchronizer with controlled metastability characteristics Jun 30, 2019 Issued
Array ( [id] => 16294191 [patent_doc_number] => 10771049 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-08 [patent_title] => Control circuit and method for avoiding reverse recovery of a power transistor [patent_app_type] => utility [patent_app_number] => 16/456233 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6682 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456233 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456233
Control circuit and method for avoiding reverse recovery of a power transistor Jun 27, 2019 Issued
Array ( [id] => 16774633 [patent_doc_number] => 10985759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Apparatuses and methods involving a segmented source-series terminated line driver [patent_app_type] => utility [patent_app_number] => 16/456236 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7577 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456236 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456236
Apparatuses and methods involving a segmented source-series terminated line driver Jun 27, 2019 Issued
Array ( [id] => 15986167 [patent_doc_number] => 10673426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Switch bootstrap charging circuit suitable for gate drive circuit of GaN power device [patent_app_type] => utility [patent_app_number] => 16/455803 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 12747 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 431 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455803 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455803
Switch bootstrap charging circuit suitable for gate drive circuit of GaN power device Jun 27, 2019 Issued
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