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Donnell Alan Long

Examiner (ID: 17144)

Most Active Art Unit
3754
Art Unit(s)
3754
Total Applications
1541
Issued Applications
1147
Pending Applications
109
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17019031 [patent_doc_number] => 11088684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Calibrating internal pulses in an integrated circuit [patent_app_type] => utility [patent_app_number] => 16/199548 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3891 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16199548 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/199548
Calibrating internal pulses in an integrated circuit Nov 25, 2018 Issued
Array ( [id] => 14164171 [patent_doc_number] => 20190109188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => POWER SEMICONDUCTOR DEVICE HAVING FULLY DEPLETED CHANNEL REGIONS [patent_app_type] => utility [patent_app_number] => 16/196373 [patent_app_country] => US [patent_app_date] => 2018-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16196373 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/196373
Power semiconductor device having fully depleted channel regions Nov 19, 2018 Issued
Array ( [id] => 15761685 [patent_doc_number] => 10622980 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-14 [patent_title] => Apparatus and methods for setting and clamping a node voltage [patent_app_type] => utility [patent_app_number] => 16/185396 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 8572 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185396 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185396
Apparatus and methods for setting and clamping a node voltage Nov 8, 2018 Issued
Array ( [id] => 15077773 [patent_doc_number] => 10468386 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-05 [patent_title] => TSV redundancy and TSV test select scheme [patent_app_type] => utility [patent_app_number] => 16/183961 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11739 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183961 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/183961
TSV redundancy and TSV test select scheme Nov 7, 2018 Issued
Array ( [id] => 15140931 [patent_doc_number] => 10483964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-19 [patent_title] => Signal processing device [patent_app_type] => utility [patent_app_number] => 16/183209 [patent_app_country] => US [patent_app_date] => 2018-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3432 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183209 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/183209
Signal processing device Nov 6, 2018 Issued
Array ( [id] => 15489423 [patent_doc_number] => 10560080 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-02-11 [patent_title] => Duty cycle correction [patent_app_type] => utility [patent_app_number] => 16/183698 [patent_app_country] => US [patent_app_date] => 2018-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2720 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16183698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/183698
Duty cycle correction Nov 6, 2018 Issued
Array ( [id] => 14986641 [patent_doc_number] => 10447246 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-10-15 [patent_title] => Low voltage differential signaling circuit [patent_app_type] => utility [patent_app_number] => 16/181518 [patent_app_country] => US [patent_app_date] => 2018-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5575 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16181518 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/181518
Low voltage differential signaling circuit Nov 5, 2018 Issued
Array ( [id] => 17270815 [patent_doc_number] => 11196251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Connection apparatus [patent_app_type] => utility [patent_app_number] => 16/770070 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3845 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16770070 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/770070
Connection apparatus Oct 28, 2018 Issued
Array ( [id] => 14802341 [patent_doc_number] => 10404184 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-09-03 [patent_title] => Relay adaptive to alternative current and direct current input signals [patent_app_type] => utility [patent_app_number] => 16/174169 [patent_app_country] => US [patent_app_date] => 2018-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2110 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174169 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174169
Relay adaptive to alternative current and direct current input signals Oct 28, 2018 Issued
Array ( [id] => 15842441 [patent_doc_number] => 20200136503 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => MULTI-STAGE CHARGE PUMP WITH INTER-STAGE LIMITATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/172381 [patent_app_country] => US [patent_app_date] => 2018-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3031 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16172381 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/172381
Multi-stage charge pump with inter-stage limitation circuit Oct 25, 2018 Issued
Array ( [id] => 16988250 [patent_doc_number] => 11075435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-27 [patent_title] => Electroplating of niobium titanium [patent_app_type] => utility [patent_app_number] => 16/170760 [patent_app_country] => US [patent_app_date] => 2018-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16170760 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/170760
Electroplating of niobium titanium Oct 24, 2018 Issued
Array ( [id] => 17293385 [patent_doc_number] => 20210389224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => A METHOD AND APPARATUS FOR MONITORING MICROBIAL CONTAMINANTS IN AN INDUSTRIAL PROCESS [patent_app_type] => utility [patent_app_number] => 17/286294 [patent_app_country] => US [patent_app_date] => 2018-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17286294 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/286294
Method and apparatus for monitoring microbial contaminants in an industrial process Oct 17, 2018 Issued
Array ( [id] => 17758512 [patent_doc_number] => 11398815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-26 [patent_title] => Methods and apparatuses for temperature independent delay circuitry [patent_app_type] => utility [patent_app_number] => 16/472773 [patent_app_country] => US [patent_app_date] => 2018-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5789 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16472773 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/472773
Methods and apparatuses for temperature independent delay circuitry Oct 16, 2018 Issued
Array ( [id] => 15746805 [patent_doc_number] => 20200112292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => INPUT RECEIVER CIRCUIT AND ADAPTIVE FEEDBACK METHOD [patent_app_type] => utility [patent_app_number] => 16/153324 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5081 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153324 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/153324
Input receiver circuit and adaptive feedback method Oct 4, 2018 Issued
Array ( [id] => 16463882 [patent_doc_number] => 10847239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-24 [patent_title] => Analog track-and-hold including first-order extrapolation [patent_app_type] => utility [patent_app_number] => 16/133338 [patent_app_country] => US [patent_app_date] => 2018-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 5893 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16133338 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/133338
Analog track-and-hold including first-order extrapolation Sep 16, 2018 Issued
Array ( [id] => 15956641 [patent_doc_number] => 10666239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-26 [patent_title] => Balanced frequency doubler [patent_app_type] => utility [patent_app_number] => 16/132285 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4163 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16132285 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/132285
Balanced frequency doubler Sep 13, 2018 Issued
Array ( [id] => 15015299 [patent_doc_number] => 10453808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Method for detecting thinning of an integrated circuit substrate via its rear face, and corresponding integrated circuit [patent_app_type] => utility [patent_app_number] => 16/129163 [patent_app_country] => US [patent_app_date] => 2018-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2793 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16129163 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/129163
Method for detecting thinning of an integrated circuit substrate via its rear face, and corresponding integrated circuit Sep 11, 2018 Issued
Array ( [id] => 16944663 [patent_doc_number] => 11056921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Wireless power transmission system [patent_app_type] => utility [patent_app_number] => 16/649755 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 10639 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16649755 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/649755
Wireless power transmission system Sep 10, 2018 Issued
Array ( [id] => 16232259 [patent_doc_number] => 10739807 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-11 [patent_title] => Body biasing for ultra-low voltage digital circuits [patent_app_type] => utility [patent_app_number] => 16/127771 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3596 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16127771 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/127771
Body biasing for ultra-low voltage digital circuits Sep 10, 2018 Issued
Array ( [id] => 13800527 [patent_doc_number] => 20190013802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => HIGH-RESOLUTION FET VDS ZERO-VOLT-CROSSING TIMING DETECTION SCHEME IN A WIRELESS POWER TRANSFER SYSTEM [patent_app_type] => utility [patent_app_number] => 16/128038 [patent_app_country] => US [patent_app_date] => 2018-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16128038 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/128038
VDS comparator rise P, fall P, on late, off late outputs for ZVC timing Sep 10, 2018 Issued
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