Search

Donnell Alan Long

Examiner (ID: 17144)

Most Active Art Unit
3754
Art Unit(s)
3754
Total Applications
1541
Issued Applications
1147
Pending Applications
109
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14206955 [patent_doc_number] => 10270611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Information processing method and information processing system [patent_app_type] => utility [patent_app_number] => 15/710142 [patent_app_country] => US [patent_app_date] => 2017-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15710142 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/710142
Information processing method and information processing system Sep 19, 2017 Issued
Array ( [id] => 12060472 [patent_doc_number] => 20170336816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND POWER SUPPLY CONTROL SYSTEM PROVIDED WITH A PLURALITY OF SEMICONDUCTOR INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 15/673197 [patent_app_country] => US [patent_app_date] => 2017-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6235 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15673197 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/673197
Semiconductor integrated circuit and power supply control system provided with a plurality of semiconductor integrated circuits Aug 8, 2017 Issued
Array ( [id] => 14921707 [patent_doc_number] => 10432188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Ringing suppression circuit and ringing suppression method [patent_app_type] => utility [patent_app_number] => 16/099711 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 4257 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16099711 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/099711
Ringing suppression circuit and ringing suppression method Aug 3, 2017 Issued
Array ( [id] => 12761620 [patent_doc_number] => 20180145708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => RADIO FREQUENCY SWITCH APPARATUS HAVING DYNAMIC BIAS [patent_app_type] => utility [patent_app_number] => 15/667808 [patent_app_country] => US [patent_app_date] => 2017-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5072 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15667808 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/667808
Radio frequency switch apparatus having dynamic bias Aug 2, 2017 Issued
Array ( [id] => 12052611 [patent_doc_number] => 20170328954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-16 [patent_title] => 'SCAN FLIP-FLOP AND SCAN TEST CIRCUIT INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/663852 [patent_app_country] => US [patent_app_date] => 2017-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13661 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15663852 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/663852
Scan flip-flop and scan test circuit including the same Jul 30, 2017 Issued
Array ( [id] => 12027571 [patent_doc_number] => 20170317670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'ELECTRONIC SWITCH, AND CORRESPONDING DEVICE AND METHOD' [patent_app_type] => utility [patent_app_number] => 15/655389 [patent_app_country] => US [patent_app_date] => 2017-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5103 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15655389 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/655389
Electronic switch, and corresponding device and method Jul 19, 2017 Issued
Array ( [id] => 12536472 [patent_doc_number] => 10009022 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Gate energy recovery [patent_app_type] => utility [patent_app_number] => 15/653562 [patent_app_country] => US [patent_app_date] => 2017-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5747 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15653562 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/653562
Gate energy recovery Jul 18, 2017 Issued
Array ( [id] => 13291791 [patent_doc_number] => 10157087 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-12-18 [patent_title] => Robust boot block design and architecture [patent_app_type] => utility [patent_app_number] => 15/649827 [patent_app_country] => US [patent_app_date] => 2017-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5754 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15649827 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/649827
Robust boot block design and architecture Jul 13, 2017 Issued
Array ( [id] => 14177871 [patent_doc_number] => 10262956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-16 [patent_title] => Timing based camouflage circuit [patent_app_type] => utility [patent_app_number] => 15/640615 [patent_app_country] => US [patent_app_date] => 2017-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 7505 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15640615 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/640615
Timing based camouflage circuit Jul 2, 2017 Issued
Array ( [id] => 14126749 [patent_doc_number] => 10250249 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-02 [patent_title] => Recuperative gate drive circuit and method [patent_app_type] => utility [patent_app_number] => 15/638467 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15638467 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/638467
Recuperative gate drive circuit and method Jun 29, 2017 Issued
Array ( [id] => 12123053 [patent_doc_number] => 20180006639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-04 [patent_title] => 'Electronic Switching and Reverse Polarity Protection Circuit' [patent_app_type] => utility [patent_app_number] => 15/639834 [patent_app_country] => US [patent_app_date] => 2017-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7491 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15639834 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/639834
Electronic switching and reverse polarity protection circuit Jun 29, 2017 Issued
Array ( [id] => 13336017 [patent_doc_number] => 20180219547 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-02 [patent_title] => RING AMPLITUDE MEASUREMENT AND MITIGATION [patent_app_type] => utility [patent_app_number] => 15/636365 [patent_app_country] => US [patent_app_date] => 2017-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5037 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15636365 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/636365
Ring amplitude measurement and mitigation Jun 27, 2017 Issued
Array ( [id] => 13243247 [patent_doc_number] => 10134835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Power semiconductor device having fully depleted channel regions [patent_app_type] => utility [patent_app_number] => 15/634720 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 22251 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634720 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634720
Power semiconductor device having fully depleted channel regions Jun 26, 2017 Issued
Array ( [id] => 12224301 [patent_doc_number] => 20180062662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'PHASE-LOCKED LOOP' [patent_app_type] => utility [patent_app_number] => 15/634894 [patent_app_country] => US [patent_app_date] => 2017-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5181 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15634894 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/634894
Phase-locked loop Jun 26, 2017 Issued
Array ( [id] => 14037193 [patent_doc_number] => 10230360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-12 [patent_title] => Increasing resolution of on-chip timing uncertainty measurements [patent_app_type] => utility [patent_app_number] => 15/624992 [patent_app_country] => US [patent_app_date] => 2017-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12924 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15624992 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/624992
Increasing resolution of on-chip timing uncertainty measurements Jun 15, 2017 Issued
Array ( [id] => 14491357 [patent_doc_number] => 10332476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Multi-mode low current dual voltage self-regulated LCD pump system [patent_app_type] => utility [patent_app_number] => 15/621786 [patent_app_country] => US [patent_app_date] => 2017-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 4637 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15621786 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/621786
Multi-mode low current dual voltage self-regulated LCD pump system Jun 12, 2017 Issued
Array ( [id] => 14253785 [patent_doc_number] => 10277105 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-04-30 [patent_title] => Method and apparatus for delivering power to semiconductors [patent_app_type] => utility [patent_app_number] => 15/616288 [patent_app_country] => US [patent_app_date] => 2017-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 34 [patent_no_of_words] => 16693 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15616288 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/616288
Method and apparatus for delivering power to semiconductors Jun 6, 2017 Issued
Array ( [id] => 12536502 [patent_doc_number] => 10009032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Alignment of samples across different clock domains [patent_app_type] => utility [patent_app_number] => 15/612924 [patent_app_country] => US [patent_app_date] => 2017-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15612924 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/612924
Alignment of samples across different clock domains Jun 1, 2017 Issued
Array ( [id] => 13031603 [patent_doc_number] => 10038431 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-31 [patent_title] => Current mirror array for high-frequency clock generator [patent_app_type] => utility [patent_app_number] => 15/610648 [patent_app_country] => US [patent_app_date] => 2017-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 4171 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15610648 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/610648
Current mirror array for high-frequency clock generator May 31, 2017 Issued
Array ( [id] => 11923907 [patent_doc_number] => 09791482 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-10-17 [patent_title] => 'Power integrated circuit with autonomous limit checking of ADC channel measurements' [patent_app_type] => utility [patent_app_number] => 15/607683 [patent_app_country] => US [patent_app_date] => 2017-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 8901 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607683 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607683
Power integrated circuit with autonomous limit checking of ADC channel measurements May 29, 2017 Issued
Menu