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Donnell Alan Long

Examiner (ID: 17144)

Most Active Art Unit
3754
Art Unit(s)
3754
Total Applications
1541
Issued Applications
1147
Pending Applications
109
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12419169 [patent_doc_number] => 09973343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Power supply system, power sourcing equipment, and ethernet Y cable [patent_app_type] => utility [patent_app_number] => 14/931894 [patent_app_country] => US [patent_app_date] => 2015-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6472 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14931894 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/931894
Power supply system, power sourcing equipment, and ethernet Y cable Nov 3, 2015 Issued
Array ( [id] => 11933052 [patent_doc_number] => 09800062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Power supply system and resonance circuit' [patent_app_type] => utility [patent_app_number] => 14/925124 [patent_app_country] => US [patent_app_date] => 2015-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3998 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14925124 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/925124
Power supply system and resonance circuit Oct 27, 2015 Issued
Array ( [id] => 10759013 [patent_doc_number] => 20160105166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'BIDIRECTIONAL DELAY CIRCUIT AND INTEGRATED CIRCUIT INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/877258 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 15227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14877258 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/877258
Bidirectional delay circuit and integrated circuit including the same Oct 6, 2015 Issued
Array ( [id] => 11702473 [patent_doc_number] => 09692410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Semiconductor switch' [patent_app_type] => utility [patent_app_number] => 14/875288 [patent_app_country] => US [patent_app_date] => 2015-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8139 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 275 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14875288 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/875288
Semiconductor switch Oct 4, 2015 Issued
Array ( [id] => 10751660 [patent_doc_number] => 20160097811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'SCAN FLIP-FLOP AND SCAN TEST CIRCUIT INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/873634 [patent_app_country] => US [patent_app_date] => 2015-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14873634 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/873634
Scan flip-flop and scan test circuit including the same Oct 1, 2015 Issued
Array ( [id] => 10675564 [patent_doc_number] => 20160021709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'INDEPENDENTLY PROGRAMMABLE LIGHTS FOR USE IN GLOVES' [patent_app_type] => utility [patent_app_number] => 14/868244 [patent_app_country] => US [patent_app_date] => 2015-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3471 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14868244 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/868244
Independently programmable lights for use in gloves Sep 27, 2015 Issued
Array ( [id] => 11807642 [patent_doc_number] => 09548748 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-17 [patent_title] => 'Digital phase locked loop (PLL) system and method with phase tracing' [patent_app_type] => utility [patent_app_number] => 14/867289 [patent_app_country] => US [patent_app_date] => 2015-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8872 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14867289 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/867289
Digital phase locked loop (PLL) system and method with phase tracing Sep 27, 2015 Issued
Array ( [id] => 11412390 [patent_doc_number] => 09559709 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-01-31 [patent_title] => 'Digitally controlled oscillator (DCO) for a phase locked loop (PLL) system' [patent_app_type] => utility [patent_app_number] => 14/867298 [patent_app_country] => US [patent_app_date] => 2015-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8811 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14867298 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/867298
Digitally controlled oscillator (DCO) for a phase locked loop (PLL) system Sep 27, 2015 Issued
Array ( [id] => 11340104 [patent_doc_number] => 20160365859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-12-15 [patent_title] => 'Wideband Highly-Linear Low Output Impedance D2S Buffer Circuit' [patent_app_type] => utility [patent_app_number] => 14/862520 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862520 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/862520
Wideband highly-linear low output impedance D2S buffer circuit Sep 22, 2015 Issued
Array ( [id] => 12215502 [patent_doc_number] => 09912323 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-06 [patent_title] => 'Radiation hardened structured ASIC platform with compensation of delay for temperature and voltage variations for multiple redundant temporal voting latch technology' [patent_app_type] => utility [patent_app_number] => 14/862140 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9228 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 377 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862140 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/862140
Radiation hardened structured ASIC platform with compensation of delay for temperature and voltage variations for multiple redundant temporal voting latch technology Sep 21, 2015 Issued
Array ( [id] => 11418075 [patent_doc_number] => 09564909 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-02-07 [patent_title] => 'Method and circuit for delay adjustment monotonicity in a delay line' [patent_app_type] => utility [patent_app_number] => 14/861079 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14861079 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/861079
Method and circuit for delay adjustment monotonicity in a delay line Sep 21, 2015 Issued
Array ( [id] => 10795905 [patent_doc_number] => 20160142061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'PHASE DETECTOR AND ASSOCIATED PHASE DETECTING METHOD' [patent_app_type] => utility [patent_app_number] => 14/860711 [patent_app_country] => US [patent_app_date] => 2015-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6769 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14860711 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/860711
Phase detector and associated phase detecting method Sep 21, 2015 Issued
Array ( [id] => 11510943 [patent_doc_number] => 09602114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-21 [patent_title] => 'Phase-locked loop with multiple degrees of freedom and its design and fabrication method' [patent_app_type] => utility [patent_app_number] => 14/853247 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 34 [patent_no_of_words] => 9854 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14853247 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/853247
Phase-locked loop with multiple degrees of freedom and its design and fabrication method Sep 13, 2015 Issued
Array ( [id] => 10660285 [patent_doc_number] => 20160006429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'DRIVE DEVICE FOR INSULATED-GATE SEMICONDUCTOR ELEMENT, AND POWER CONVERTER' [patent_app_type] => utility [patent_app_number] => 14/854006 [patent_app_country] => US [patent_app_date] => 2015-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6052 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854006 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/854006
Drive device for insulated-gate semiconductor element, and power converter Sep 13, 2015 Issued
Array ( [id] => 11104432 [patent_doc_number] => 20160301402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/848429 [patent_app_country] => US [patent_app_date] => 2015-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3995 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14848429 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/848429
Semiconductor integrated circuit apparatus Sep 8, 2015 Issued
Array ( [id] => 11476590 [patent_doc_number] => 20170063373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'Multiplexer' [patent_app_type] => utility [patent_app_number] => 14/843373 [patent_app_country] => US [patent_app_date] => 2015-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1621 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14843373 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/843373
Multiplexer Sep 1, 2015 Abandoned
Array ( [id] => 11476570 [patent_doc_number] => 20170063353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'OPEN-LOOP QUADRATURE CLOCK CORRECTOR AND GENERATOR' [patent_app_type] => utility [patent_app_number] => 14/841874 [patent_app_country] => US [patent_app_date] => 2015-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6390 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14841874 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/841874
Open-loop quadrature clock corrector and generator Aug 31, 2015 Issued
Array ( [id] => 11280373 [patent_doc_number] => 09496860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-15 [patent_title] => 'Phase control circuit and receiving device' [patent_app_type] => utility [patent_app_number] => 14/832756 [patent_app_country] => US [patent_app_date] => 2015-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10585 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14832756 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/832756
Phase control circuit and receiving device Aug 20, 2015 Issued
Array ( [id] => 11855551 [patent_doc_number] => 20170230043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'A PASSIVE LEAKAGE MANAGEMENT CIRCUIT FOR A SWITCH LEAKAGE CURRENT' [patent_app_type] => utility [patent_app_number] => 15/502544 [patent_app_country] => US [patent_app_date] => 2015-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3623 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15502544 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/502544
Passive leakage management circuit for a switch leakage current Aug 6, 2015 Issued
Array ( [id] => 11285189 [patent_doc_number] => 09501042 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-11-22 [patent_title] => 'Timing device and method thereof' [patent_app_type] => utility [patent_app_number] => 14/816137 [patent_app_country] => US [patent_app_date] => 2015-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 3066 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14816137 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/816137
Timing device and method thereof Aug 2, 2015 Issued
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