Search

Donnell Alan Long

Examiner (ID: 17144)

Most Active Art Unit
3754
Art Unit(s)
3754
Total Applications
1541
Issued Applications
1147
Pending Applications
109
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8364419 [patent_doc_number] => 08253484 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-08-28 [patent_title] => 'Configurable clock network for programmable logic device' [patent_app_type] => utility [patent_app_number] => 13/283841 [patent_app_country] => US [patent_app_date] => 2011-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4681 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13283841 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/283841
Configurable clock network for programmable logic device Oct 27, 2011 Issued
Array ( [id] => 8765444 [patent_doc_number] => 20130093481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-18 [patent_title] => 'HIGH FREQUENCY CMOS PROGRAMMABLE DIVIDER WITH LARGE DIVIDE RATIO' [patent_app_type] => utility [patent_app_number] => 13/275367 [patent_app_country] => US [patent_app_date] => 2011-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5029 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13275367 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/275367
Phase lock loop having high frequency CMOS programmable divider with large divide ratio Oct 17, 2011 Issued
Array ( [id] => 8753966 [patent_doc_number] => 20130088270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-11 [patent_title] => 'METHOD AND APPARATUS FOR DETERMINING DUTY CYCLE OF A CLOCK IN A CIRCUIT USING A CONFIGURABLE PHASE LOCKED LOOP' [patent_app_type] => utility [patent_app_number] => 13/269678 [patent_app_country] => US [patent_app_date] => 2011-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3562 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13269678 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/269678
Method and apparatus for determining duty cycle of a clock in a circuit using a configurable phase locked loop Oct 9, 2011 Issued
Array ( [id] => 8630741 [patent_doc_number] => 08362819 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-01-29 [patent_title] => 'Synchronizing multi-frequency pulse width modulation generators' [patent_app_type] => utility [patent_app_number] => 13/248668 [patent_app_country] => US [patent_app_date] => 2011-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3990 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 496 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13248668 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/248668
Synchronizing multi-frequency pulse width modulation generators Sep 28, 2011 Issued
Array ( [id] => 9711812 [patent_doc_number] => 08836389 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Apparatus, system, and method for controlling temperature and power supply voltage drift in a digital phase locked loop' [patent_app_type] => utility [patent_app_number] => 13/991614 [patent_app_country] => US [patent_app_date] => 2011-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6518 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13991614 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/991614
Apparatus, system, and method for controlling temperature and power supply voltage drift in a digital phase locked loop Sep 27, 2011 Issued
Array ( [id] => 8414883 [patent_doc_number] => 20120242382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-27 [patent_title] => 'PHASE ADJUSTER AND SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/237062 [patent_app_country] => US [patent_app_date] => 2011-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5874 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13237062 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/237062
PHASE ADJUSTER AND SEMICONDUCTOR APPARATUS Sep 19, 2011 Abandoned
Array ( [id] => 9000744 [patent_doc_number] => 20130221868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'Illuminable Wall Socket Plates and Systems and Methods Thereof' [patent_app_type] => utility [patent_app_number] => 13/821366 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3945 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13821366 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/821366
Illuminable wall socket plates and systems and methods thereof Sep 5, 2011 Issued
Array ( [id] => 8695313 [patent_doc_number] => 20130057322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'DELAY CIRCUIT AND DELAY STAGE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/226269 [patent_app_country] => US [patent_app_date] => 2011-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3154 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13226269 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/226269
DELAY CIRCUIT AND DELAY STAGE THEREOF Sep 5, 2011 Abandoned
Array ( [id] => 8881190 [patent_doc_number] => 20130154374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'SIGNAL PROCESSING CIRCUIT, INVERTER CIRCUIT, BUFFER CIRCUIT, LEVEL SHIFTER, FLIP-FLOP, DRIVER CIRCUIT, AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/819400 [patent_app_country] => US [patent_app_date] => 2011-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 9125 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13819400 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/819400
Signal processing circuit, inverter circuit, buffer circuit, level shifter, flip-flop, driver circuit, and display device Aug 30, 2011 Issued
Array ( [id] => 8091099 [patent_doc_number] => 20120081163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'RF DUTY CYCLE CORRECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/219982 [patent_app_country] => US [patent_app_date] => 2011-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5144 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20120081163.pdf [firstpage_image] =>[orig_patent_app_number] => 13219982 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/219982
RF duty cycle correction circuit Aug 28, 2011 Issued
Array ( [id] => 11212781 [patent_doc_number] => 09441811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-13 [patent_title] => 'Lighting devices utilizing optical waveguides and remote light converters, and related methods' [patent_app_type] => utility [patent_app_number] => 13/817903 [patent_app_country] => US [patent_app_date] => 2011-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 18877 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13817903 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/817903
Lighting devices utilizing optical waveguides and remote light converters, and related methods Aug 18, 2011 Issued
Array ( [id] => 8835277 [patent_doc_number] => 08451036 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Pulse signal generation circuit and method for operating the same' [patent_app_type] => utility [patent_app_number] => 13/205998 [patent_app_country] => US [patent_app_date] => 2011-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2785 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13205998 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/205998
Pulse signal generation circuit and method for operating the same Aug 8, 2011 Issued
Array ( [id] => 10158475 [patent_doc_number] => 09190259 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Discharge lamp and discharge lamp apparatus' [patent_app_type] => utility [patent_app_number] => 13/825464 [patent_app_country] => US [patent_app_date] => 2011-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 26 [patent_no_of_words] => 7852 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13825464 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/825464
Discharge lamp and discharge lamp apparatus Aug 7, 2011 Issued
Array ( [id] => 7565310 [patent_doc_number] => 20110285373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'PULSE GENERATING CIRCUIT AND PULSE WIDTH MODULATOR' [patent_app_type] => utility [patent_app_number] => 13/198924 [patent_app_country] => US [patent_app_date] => 2011-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3005 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20110285373.pdf [firstpage_image] =>[orig_patent_app_number] => 13198924 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198924
PULSE GENERATING CIRCUIT AND PULSE WIDTH MODULATOR Aug 4, 2011 Abandoned
Array ( [id] => 8333613 [patent_doc_number] => 20120200319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'Method for operating a PWM output of a driver for a power semiconductor' [patent_app_type] => utility [patent_app_number] => 13/195762 [patent_app_country] => US [patent_app_date] => 2011-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3316 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13195762 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/195762
Method for operating a PWM output of a driver for a power semiconductor Jul 31, 2011 Issued
Array ( [id] => 8839271 [patent_doc_number] => 20130134899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-30 [patent_title] => 'METHOD FOR OPERATING A HIGH-PRESSURE DISCHARGE LAMP OUTSIDE THE NOMINAL POWER RANGE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/814268 [patent_app_country] => US [patent_app_date] => 2011-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5157 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13814268 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/814268
Method for operating a high-pressure discharge lamp outside the nominal power range thereof Jul 31, 2011 Issued
Array ( [id] => 7584649 [patent_doc_number] => 20110279159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'CIRCUITS AND METHODS FOR CLOCK SIGNAL DUTY-CYCLE CORRECTION' [patent_app_type] => utility [patent_app_number] => 13/194777 [patent_app_country] => US [patent_app_date] => 2011-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4091 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20110279159.pdf [firstpage_image] =>[orig_patent_app_number] => 13194777 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/194777
Circuits and methods for clock signal duty-cycle correction Jul 28, 2011 Issued
Array ( [id] => 9014829 [patent_doc_number] => 20130229793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-05 [patent_title] => 'LIGHTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/821551 [patent_app_country] => US [patent_app_date] => 2011-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3084 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13821551 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/821551
Lighting apparatus Jul 24, 2011 Issued
Array ( [id] => 11346934 [patent_doc_number] => 09531353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-27 [patent_title] => 'Switching arrangement' [patent_app_type] => utility [patent_app_number] => 13/807543 [patent_app_country] => US [patent_app_date] => 2011-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3102 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13807543 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/807543
Switching arrangement Jun 28, 2011 Issued
Array ( [id] => 8750162 [patent_doc_number] => 08415996 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-04-09 [patent_title] => 'Clock phase corrector' [patent_app_type] => utility [patent_app_number] => 13/167956 [patent_app_country] => US [patent_app_date] => 2011-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13167956 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/167956
Clock phase corrector Jun 23, 2011 Issued
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