
Donnell Alan Long
Examiner (ID: 17144)
| Most Active Art Unit | 3754 |
| Art Unit(s) | 3754 |
| Total Applications | 1541 |
| Issued Applications | 1147 |
| Pending Applications | 109 |
| Abandoned Applications | 316 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8364419
[patent_doc_number] => 08253484
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-08-28
[patent_title] => 'Configurable clock network for programmable logic device'
[patent_app_type] => utility
[patent_app_number] => 13/283841
[patent_app_country] => US
[patent_app_date] => 2011-10-28
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13283841
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/283841 | Configurable clock network for programmable logic device | Oct 27, 2011 | Issued |
Array
(
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[patent_doc_number] => 20130093481
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[patent_kind] => A1
[patent_issue_date] => 2013-04-18
[patent_title] => 'HIGH FREQUENCY CMOS PROGRAMMABLE DIVIDER WITH LARGE DIVIDE RATIO'
[patent_app_type] => utility
[patent_app_number] => 13/275367
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/275367 | Phase lock loop having high frequency CMOS programmable divider with large divide ratio | Oct 17, 2011 | Issued |
Array
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[patent_doc_number] => 20130088270
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[patent_issue_date] => 2013-04-11
[patent_title] => 'METHOD AND APPARATUS FOR DETERMINING DUTY CYCLE OF A CLOCK IN A CIRCUIT USING A CONFIGURABLE PHASE LOCKED LOOP'
[patent_app_type] => utility
[patent_app_number] => 13/269678
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/269678 | Method and apparatus for determining duty cycle of a clock in a circuit using a configurable phase locked loop | Oct 9, 2011 | Issued |
Array
(
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[patent_issue_date] => 2013-01-29
[patent_title] => 'Synchronizing multi-frequency pulse width modulation generators'
[patent_app_type] => utility
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Array
(
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[patent_issue_date] => 2014-09-16
[patent_title] => 'Apparatus, system, and method for controlling temperature and power supply voltage drift in a digital phase locked loop'
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Array
(
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[patent_doc_number] => 20120242382
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[patent_issue_date] => 2012-09-27
[patent_title] => 'PHASE ADJUSTER AND SEMICONDUCTOR APPARATUS'
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Array
(
[id] => 9000744
[patent_doc_number] => 20130221868
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[patent_title] => 'Illuminable Wall Socket Plates and Systems and Methods Thereof'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/821366 | Illuminable wall socket plates and systems and methods thereof | Sep 5, 2011 | Issued |
Array
(
[id] => 8695313
[patent_doc_number] => 20130057322
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[patent_issue_date] => 2013-03-07
[patent_title] => 'DELAY CIRCUIT AND DELAY STAGE THEREOF'
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[patent_app_number] => 13/226269
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Array
(
[id] => 8881190
[patent_doc_number] => 20130154374
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[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'SIGNAL PROCESSING CIRCUIT, INVERTER CIRCUIT, BUFFER CIRCUIT, LEVEL SHIFTER, FLIP-FLOP, DRIVER CIRCUIT, AND DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/819400
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/819400 | Signal processing circuit, inverter circuit, buffer circuit, level shifter, flip-flop, driver circuit, and display device | Aug 30, 2011 | Issued |
Array
(
[id] => 8091099
[patent_doc_number] => 20120081163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-05
[patent_title] => 'RF DUTY CYCLE CORRECTION CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 13/219982
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/219982 | RF duty cycle correction circuit | Aug 28, 2011 | Issued |
Array
(
[id] => 11212781
[patent_doc_number] => 09441811
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-09-13
[patent_title] => 'Lighting devices utilizing optical waveguides and remote light converters, and related methods'
[patent_app_type] => utility
[patent_app_number] => 13/817903
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/817903 | Lighting devices utilizing optical waveguides and remote light converters, and related methods | Aug 18, 2011 | Issued |
Array
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[id] => 8835277
[patent_doc_number] => 08451036
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[patent_title] => 'Pulse signal generation circuit and method for operating the same'
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Array
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[id] => 10158475
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[patent_title] => 'Discharge lamp and discharge lamp apparatus'
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Array
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/167956 | Clock phase corrector | Jun 23, 2011 | Issued |