Donnell Alan Long

Array ( [id] => 8190718 [patent_doc_number] => 08183903 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-22 [patent_title] => 'Signal interpolation methods and circuits' [patent_app_type] => utility [patent_app_number] => 12/630601 [patent_app_country] => US [patent_app_date] => 2009-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6552 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/183/08183903.pdf [firstpage_image] =>[orig_patent_app_number] => 12630601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6414461 [patent_doc_number] => 20100141315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'APPARATUS FOR LINEARIZATION OF DIGITALLY CONTROLLED OSCILLATOR' [patent_app_type] => utility [patent_app_number] => 12/629701 [patent_app_country] => US [patent_app_date] => 2009-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2835 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20100141315.pdf [firstpage_image] =>[orig_patent_app_number] => 12629701 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4625028 [patent_doc_number] => 08004330 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-08-23 [patent_title] => 'Reduction of electromagnetic interference for differential signals' [patent_app_type] => utility [patent_app_number] => 12/627345 [patent_app_country] => US [patent_app_date] => 2009-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 13270 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/004/08004330.pdf [firstpage_image] =>[orig_patent_app_number] => 12627345 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4577111 [patent_doc_number] => 07859329 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-12-28 [patent_title] => 'Configurable clock network for programmable logic device' [patent_app_type] => utility [patent_app_number] => 12/625718 [patent_app_country] => US [patent_app_date] => 2009-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4620 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859329.pdf [firstpage_image] =>[orig_patent_app_number] => 12625718 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7505476 [patent_doc_number] => 08035437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-11 [patent_title] => 'Phase interpolator' [patent_app_type] => utility [patent_app_number] => 12/624698 [patent_app_country] => US [patent_app_date] => 2009-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 7397 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/035/08035437.pdf [firstpage_image] =>[orig_patent_app_number] => 12624698 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4635191 [patent_doc_number] => 08013647 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Physical quantity detection circuit and physical quantity sensor device' [patent_app_type] => utility [patent_app_number] => 12/621837 [patent_app_country] => US [patent_app_date] => 2009-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 8826 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/013/08013647.pdf [firstpage_image] =>[orig_patent_app_number] => 12621837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8458829 [patent_doc_number] => 08294500 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-23 [patent_title] => 'Multi-phase interpolators and related methods' [patent_app_type] => utility [patent_app_number] => 12/621493 [patent_app_country] => US [patent_app_date] => 2009-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8683 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12621493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6282536 [patent_doc_number] => 20100156499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'LOGIC LEVEL CONVERTER' [patent_app_type] => utility [patent_app_number] => 12/621380 [patent_app_country] => US [patent_app_date] => 2009-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2106 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20100156499.pdf [firstpage_image] =>[orig_patent_app_number] => 12621380 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4512021 [patent_doc_number] => 07915935 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-03-29 [patent_title] => 'Communication systems w/counter-based frequency centering for mm-wave frequency bands' [patent_app_type] => utility [patent_app_number] => 12/618109 [patent_app_country] => US [patent_app_date] => 2009-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5422 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/915/07915935.pdf [firstpage_image] =>[orig_patent_app_number] => 12618109 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6053000 [patent_doc_number] => 20110109360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-12 [patent_title] => 'SYSTEM AND METHOD FOR IMPROVED TIMING SYNCHRONIZATION' [patent_app_type] => utility [patent_app_number] => 12/614247 [patent_app_country] => US [patent_app_date] => 2009-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8485 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20110109360.pdf [firstpage_image] =>[orig_patent_app_number] => 12614247 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6552024 [patent_doc_number] => 20100045352 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'METHOD AND APPARATUS FOR PULSE WIDTH MODULATION' [patent_app_type] => utility [patent_app_number] => 12/608845 [patent_app_country] => US [patent_app_date] => 2009-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3216 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20100045352.pdf [firstpage_image] =>[orig_patent_app_number] => 12608845 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4537736 [patent_doc_number] => 07872515 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-01-18 [patent_title] => 'Phase interpolation device and slew rate control device thereof' [patent_app_type] => utility [patent_app_number] => 12/606436 [patent_app_country] => US [patent_app_date] => 2009-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2865 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/872/07872515.pdf [firstpage_image] =>[orig_patent_app_number] => 12606436 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4554806 [patent_doc_number] => 07961019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-14 [patent_title] => 'Delay-lock loop and method adapting itself to operate over a wide frequency range' [patent_app_type] => utility [patent_app_number] => 12/605203 [patent_app_country] => US [patent_app_date] => 2009-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5283 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/961/07961019.pdf [firstpage_image] =>[orig_patent_app_number] => 12605203 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4614751 [patent_doc_number] => 07990195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Duty cycle correction circuits having short locking times that are relatively insensitive to temperature changes' [patent_app_type] => utility [patent_app_number] => 12/603717 [patent_app_country] => US [patent_app_date] => 2009-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5122 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/990/07990195.pdf [firstpage_image] =>[orig_patent_app_number] => 12603717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4645134 [patent_doc_number] => 08022743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-20 [patent_title] => 'Pulse width modulation circuit and liquid jet printing apparatus' [patent_app_type] => utility [patent_app_number] => 12/582766 [patent_app_country] => US [patent_app_date] => 2009-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 10975 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/022/08022743.pdf [firstpage_image] =>[orig_patent_app_number] => 12582766 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4640235 [patent_doc_number] => 08018263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-13 [patent_title] => 'Pulse generating circuit and pulse width modulator' [patent_app_type] => utility [patent_app_number] => 12/582551 [patent_app_country] => US [patent_app_date] => 2009-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3005 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/018/08018263.pdf [firstpage_image] =>[orig_patent_app_number] => 12582551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4635195 [patent_doc_number] => 08013651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Signal converter for wireless communication and receiving device using the same' [patent_app_type] => utility [patent_app_number] => 12/580360 [patent_app_country] => US [patent_app_date] => 2009-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3947 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/013/08013651.pdf [firstpage_image] =>[orig_patent_app_number] => 12580360 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4434189 [patent_doc_number] => 07969217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-28 [patent_title] => 'Output buffer with slew-rate enhancement output stage' [patent_app_type] => utility [patent_app_number] => 12/577857 [patent_app_country] => US [patent_app_date] => 2009-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3189 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/969/07969217.pdf [firstpage_image] =>[orig_patent_app_number] => 12577857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8178753 [patent_doc_number] => 08179187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'Substrate noise passive cancellation method for buck converter' [patent_app_type] => utility [patent_app_number] => 12/578569 [patent_app_country] => US [patent_app_date] => 2009-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2960 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/179/08179187.pdf [firstpage_image] =>[orig_patent_app_number] => 12578569 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4614753 [patent_doc_number] => 07990197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Internal clock driver circuit' [patent_app_type] => utility [patent_app_number] => 12/573624 [patent_app_country] => US [patent_app_date] => 2009-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6612 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/990/07990197.pdf [firstpage_image] =>[orig_patent_app_number] => 12573624 [rel_patent_id] =>[rel_patent_doc_number] =>)