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Donnell Alan Long

Examiner (ID: 17144)

Most Active Art Unit
3754
Art Unit(s)
3754
Total Applications
1541
Issued Applications
1147
Pending Applications
109
Abandoned Applications
316

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6554244 [patent_doc_number] => 20100127740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'Semiconductor apparatus and anomaly detection method of the same' [patent_app_type] => utility [patent_app_number] => 12/320576 [patent_app_country] => US [patent_app_date] => 2009-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4850 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20100127740.pdf [firstpage_image] =>[orig_patent_app_number] => 12320576 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/320576
Semiconductor apparatus and anomaly detection method of the same Jan 28, 2009 Issued
Array ( [id] => 6437020 [patent_doc_number] => 20100188126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-29 [patent_title] => 'Voltage Controlled Duty Cycle and Non-Overlapping Clock Generation Implementation' [patent_app_type] => utility [patent_app_number] => 12/359583 [patent_app_country] => US [patent_app_date] => 2009-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4477 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20100188126.pdf [firstpage_image] =>[orig_patent_app_number] => 12359583 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/359583
Voltage Controlled Duty Cycle and Non-Overlapping Clock Generation Implementation Jan 25, 2009 Abandoned
Array ( [id] => 6522363 [patent_doc_number] => 20100123507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'CIRCUIT AND METHOD FOR IMPLEMENTING FREQUENCY TRIPLED I/Q SIGNALS' [patent_app_type] => utility [patent_app_number] => 12/356402 [patent_app_country] => US [patent_app_date] => 2009-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3249 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123507.pdf [firstpage_image] =>[orig_patent_app_number] => 12356402 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/356402
Circuit and method for implementing frequency tripled I/Q signals Jan 19, 2009 Issued
Array ( [id] => 6386154 [patent_doc_number] => 20100176855 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'PULSE WIDTH MODULATED CIRCUITRY FOR INTEGRATED DEVICES' [patent_app_type] => utility [patent_app_number] => 12/352034 [patent_app_country] => US [patent_app_date] => 2009-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5347 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20100176855.pdf [firstpage_image] =>[orig_patent_app_number] => 12352034 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/352034
PULSE WIDTH MODULATED CIRCUITRY FOR INTEGRATED DEVICES Jan 11, 2009 Abandoned
Array ( [id] => 5341031 [patent_doc_number] => 20090179681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/351426 [patent_app_country] => US [patent_app_date] => 2009-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 21965 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0179/20090179681.pdf [firstpage_image] =>[orig_patent_app_number] => 12351426 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/351426
Semiconductor device Jan 8, 2009 Issued
Array ( [id] => 4578561 [patent_doc_number] => 07855586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-21 [patent_title] => 'Frequency jitter generator and PWM controller' [patent_app_type] => utility [patent_app_number] => 12/347074 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2647 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/855/07855586.pdf [firstpage_image] =>[orig_patent_app_number] => 12347074 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347074
Frequency jitter generator and PWM controller Dec 30, 2008 Issued
Array ( [id] => 4572691 [patent_doc_number] => 07847609 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Duty detecting circuit and duty cycle corrector including the same' [patent_app_type] => utility [patent_app_number] => 12/343859 [patent_app_country] => US [patent_app_date] => 2008-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 7539 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/847/07847609.pdf [firstpage_image] =>[orig_patent_app_number] => 12343859 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/343859
Duty detecting circuit and duty cycle corrector including the same Dec 23, 2008 Issued
Array ( [id] => 5550307 [patent_doc_number] => 20090284293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'DUTY CORRECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/343753 [patent_app_country] => US [patent_app_date] => 2008-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 9602 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20090284293.pdf [firstpage_image] =>[orig_patent_app_number] => 12343753 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/343753
Duty correction circuit Dec 23, 2008 Issued
Array ( [id] => 4560437 [patent_doc_number] => 07821316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-26 [patent_title] => 'Multiphase clock generator with enhanced phase control' [patent_app_type] => utility [patent_app_number] => 12/342857 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 4766 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/821/07821316.pdf [firstpage_image] =>[orig_patent_app_number] => 12342857 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/342857
Multiphase clock generator with enhanced phase control Dec 22, 2008 Issued
Array ( [id] => 44041 [patent_doc_number] => 07782104 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Delay element array for time-to-digital converters' [patent_app_type] => utility [patent_app_number] => 12/342443 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3084 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782104.pdf [firstpage_image] =>[orig_patent_app_number] => 12342443 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/342443
Delay element array for time-to-digital converters Dec 22, 2008 Issued
Array ( [id] => 6273636 [patent_doc_number] => 20100117692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'MULTI-PHASE CLOCK GENERATION CIRCUIT HAVING A LOW SKEW IMPRECISION' [patent_app_type] => utility [patent_app_number] => 12/342778 [patent_app_country] => US [patent_app_date] => 2008-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4648 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20100117692.pdf [firstpage_image] =>[orig_patent_app_number] => 12342778 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/342778
Multi-phase clock generation circuit having a low skew imprecision Dec 22, 2008 Issued
Array ( [id] => 4463307 [patent_doc_number] => 07880520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 12/341296 [patent_app_country] => US [patent_app_date] => 2008-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 35 [patent_no_of_words] => 12303 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/880/07880520.pdf [firstpage_image] =>[orig_patent_app_number] => 12341296 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/341296
Semiconductor integrated circuit Dec 21, 2008 Issued
Array ( [id] => 4635198 [patent_doc_number] => 08013654 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-09-06 [patent_title] => 'Clock generator, pulse generator utilizing the clock generator, and methods thereof' [patent_app_type] => utility [patent_app_number] => 12/336539 [patent_app_country] => US [patent_app_date] => 2008-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5999 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/013/08013654.pdf [firstpage_image] =>[orig_patent_app_number] => 12336539 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/336539
Clock generator, pulse generator utilizing the clock generator, and methods thereof Dec 16, 2008 Issued
Array ( [id] => 5389589 [patent_doc_number] => 20090206901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'DUTY CYCLE CORRECTION CIRCUIT WITH REDUCED CURRENT CONSUMPTION' [patent_app_type] => utility [patent_app_number] => 12/333193 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2992 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20090206901.pdf [firstpage_image] =>[orig_patent_app_number] => 12333193 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333193
Duty cycle correction circuit with reduced current consumption Dec 10, 2008 Issued
Array ( [id] => 5389583 [patent_doc_number] => 20090206895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-20 [patent_title] => 'PHASE SYNCHRONIZATION APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/333139 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8143 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20090206895.pdf [firstpage_image] =>[orig_patent_app_number] => 12333139 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333139
Phase synchronization apparatus Dec 10, 2008 Issued
Array ( [id] => 14912 [patent_doc_number] => 07808290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-05 [patent_title] => 'Semiconductor integrated circuit and method of controlling the same' [patent_app_type] => utility [patent_app_number] => 12/333180 [patent_app_country] => US [patent_app_date] => 2008-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4306 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/808/07808290.pdf [firstpage_image] =>[orig_patent_app_number] => 12333180 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/333180
Semiconductor integrated circuit and method of controlling the same Dec 10, 2008 Issued
Array ( [id] => 5543331 [patent_doc_number] => 20090153208 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'Pulse Width Modulation Driver for Electroactive Lens' [patent_app_type] => utility [patent_app_number] => 12/331353 [patent_app_country] => US [patent_app_date] => 2008-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2648 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20090153208.pdf [firstpage_image] =>[orig_patent_app_number] => 12331353 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/331353
Pulse width modulation driver for electroactive lens Dec 8, 2008 Issued
Array ( [id] => 44049 [patent_doc_number] => 07782112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Device and method for generating clock signal' [patent_app_type] => utility [patent_app_number] => 12/330947 [patent_app_country] => US [patent_app_date] => 2008-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4236 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782112.pdf [firstpage_image] =>[orig_patent_app_number] => 12330947 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/330947
Device and method for generating clock signal Dec 8, 2008 Issued
Array ( [id] => 93568 [patent_doc_number] => 07733151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-08 [patent_title] => 'Operating clock generation system and method for audio applications' [patent_app_type] => utility [patent_app_number] => 12/316166 [patent_app_country] => US [patent_app_date] => 2008-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8937 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/733/07733151.pdf [firstpage_image] =>[orig_patent_app_number] => 12316166 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/316166
Operating clock generation system and method for audio applications Dec 7, 2008 Issued
Array ( [id] => 5531219 [patent_doc_number] => 20090231007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT CAPABLE OF OVERCOMING CLOCK SIGNAL JITTER' [patent_app_type] => utility [patent_app_number] => 12/330287 [patent_app_country] => US [patent_app_date] => 2008-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3352 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20090231007.pdf [firstpage_image] =>[orig_patent_app_number] => 12330287 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/330287
Semiconductor integrated circuit capable of overcoming clock signal jitter Dec 7, 2008 Issued
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