Search

Dorothy H. Harris

Examiner (ID: 10524, Phone: (571)270-7539 , Office: P/2625 )

Most Active Art Unit
2625
Art Unit(s)
2699, 2625, 2629
Total Applications
1066
Issued Applications
671
Pending Applications
83
Abandoned Applications
339

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4454953 [patent_doc_number] => 07966477 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-06-21 [patent_title] => 'Power optimized replay of blocked operations in a pipilined architecture' [patent_app_type] => utility [patent_app_number] => 12/782184 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5386 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/966/07966477.pdf [firstpage_image] =>[orig_patent_app_number] => 12782184 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/782184
Power optimized replay of blocked operations in a pipilined architecture May 17, 2010 Issued
Array ( [id] => 7684074 [patent_doc_number] => 20100122067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'ACROSS-THREAD OUT-OF-ORDER INSTRUCTION DISPATCH IN A MULTITHREADED MICROPROCESSOR' [patent_app_type] => utility [patent_app_number] => 12/690225 [patent_app_country] => US [patent_app_date] => 2010-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11967 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20100122067.pdf [firstpage_image] =>[orig_patent_app_number] => 12690225 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/690225
ACROSS-THREAD OUT-OF-ORDER INSTRUCTION DISPATCH IN A MULTITHREADED MICROPROCESSOR Jan 19, 2010 Abandoned
Array ( [id] => 6166317 [patent_doc_number] => 20110161623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'Data Parallel Function Call for Determining if Called Routine is Data Parallel' [patent_app_type] => utility [patent_app_number] => 12/649751 [patent_app_country] => US [patent_app_date] => 2009-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 11029 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20110161623.pdf [firstpage_image] =>[orig_patent_app_number] => 12649751 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/649751
Data parallel function call for determining if called routine is data parallel Dec 29, 2009 Issued
Array ( [id] => 6166321 [patent_doc_number] => 20110161624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'Floating Point Collect and Operate' [patent_app_type] => utility [patent_app_number] => 12/648527 [patent_app_country] => US [patent_app_date] => 2009-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6575 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20110161624.pdf [firstpage_image] =>[orig_patent_app_number] => 12648527 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/648527
Floating point collect and operate Dec 28, 2009 Issued
Array ( [id] => 6523434 [patent_doc_number] => 20100211758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'MICROPROCESSOR AND MEMORY-ACCESS CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 12/648769 [patent_app_country] => US [patent_app_date] => 2009-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5113 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20100211758.pdf [firstpage_image] =>[orig_patent_app_number] => 12648769 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/648769
MICROPROCESSOR AND MEMORY-ACCESS CONTROL METHOD Dec 28, 2009 Abandoned
Array ( [id] => 8985100 [patent_doc_number] => 08516230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'SPE software instruction cache' [patent_app_type] => utility [patent_app_number] => 12/648741 [patent_app_country] => US [patent_app_date] => 2009-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6453 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12648741 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/648741
SPE software instruction cache Dec 28, 2009 Issued
Array ( [id] => 8645609 [patent_doc_number] => 08370607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Power efficient system for recovering an architecture register mapping table' [patent_app_type] => utility [patent_app_number] => 12/645767 [patent_app_country] => US [patent_app_date] => 2009-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8095 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12645767 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/645767
Power efficient system for recovering an architecture register mapping table Dec 22, 2009 Issued
Array ( [id] => 8404383 [patent_doc_number] => 20120236442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-20 [patent_title] => ' INTELLIGENT CONTROLLER' [patent_app_type] => utility [patent_app_number] => 13/512912 [patent_app_country] => US [patent_app_date] => 2009-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4586 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13512912 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/512912
INTELLIGENT CONTROLLER Dec 1, 2009 Abandoned
Array ( [id] => 5399697 [patent_doc_number] => 20090319760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'SINGLE-CYCLE LOW POWER CPU ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 12/549328 [patent_app_country] => US [patent_app_date] => 2009-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8790 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0319/20090319760.pdf [firstpage_image] =>[orig_patent_app_number] => 12549328 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/549328
SINGLE-CYCLE LOW POWER CPU ARCHITECTURE Aug 26, 2009 Abandoned
Array ( [id] => 5553920 [patent_doc_number] => 20090287906 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'ALLOCATING RESOURCES TO PARTITIONS IN A PARTITIONABLE COMPUTER' [patent_app_type] => utility [patent_app_number] => 12/510184 [patent_app_country] => US [patent_app_date] => 2009-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10149 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20090287906.pdf [firstpage_image] =>[orig_patent_app_number] => 12510184 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/510184
Allocating resources to partitions in a partitionable computer Jul 26, 2009 Issued
Array ( [id] => 6535814 [patent_doc_number] => 20100218191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-26 [patent_title] => 'Apparatus and Method for Processing Management Requests' [patent_app_type] => utility [patent_app_number] => 12/420064 [patent_app_country] => US [patent_app_date] => 2009-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3626 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20100218191.pdf [firstpage_image] =>[orig_patent_app_number] => 12420064 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/420064
Apparatus and Method for Processing Management Requests Apr 7, 2009 Abandoned
Array ( [id] => 9352504 [patent_doc_number] => 08671408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-11 [patent_title] => 'Blocking applications to ensure task completion' [patent_app_type] => utility [patent_app_number] => 12/418846 [patent_app_country] => US [patent_app_date] => 2009-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12418846 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/418846
Blocking applications to ensure task completion Apr 5, 2009 Issued
Array ( [id] => 5571536 [patent_doc_number] => 20090254915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-10-08 [patent_title] => 'SYSTEM AND METHOD FOR PROVIDING FAULT RESILIENT PROCESSING IN AN IMPLANTABLE MEDICAL DEVICE' [patent_app_type] => utility [patent_app_number] => 12/417702 [patent_app_country] => US [patent_app_date] => 2009-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4829 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20090254915.pdf [firstpage_image] =>[orig_patent_app_number] => 12417702 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/417702
System and method for providing fault resilient processing in an implantable medical device Apr 2, 2009 Issued
Array ( [id] => 8728557 [patent_doc_number] => 08407699 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'System and method for managing code isolation' [patent_app_type] => utility [patent_app_number] => 12/381065 [patent_app_country] => US [patent_app_date] => 2009-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 9209 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12381065 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/381065
System and method for managing code isolation Mar 4, 2009 Issued
Array ( [id] => 6451856 [patent_doc_number] => 20100153947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-17 [patent_title] => 'INFORMATION SYSTEM, METHOD OF CONTROLLING INFORMATION, AND CONTROL APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/388055 [patent_app_country] => US [patent_app_date] => 2009-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 9533 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20100153947.pdf [firstpage_image] =>[orig_patent_app_number] => 12388055 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/388055
INFORMATION SYSTEM, METHOD OF CONTROLLING INFORMATION, AND CONTROL APPARATUS Feb 17, 2009 Abandoned
Array ( [id] => 6526391 [patent_doc_number] => 20100211958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-19 [patent_title] => 'AUTOMATED RESOURCE LOAD BALANCING IN A COMPUTING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/372089 [patent_app_country] => US [patent_app_date] => 2009-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2584 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0211/20100211958.pdf [firstpage_image] =>[orig_patent_app_number] => 12372089 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/372089
AUTOMATED RESOURCE LOAD BALANCING IN A COMPUTING SYSTEM Feb 16, 2009 Abandoned
Array ( [id] => 5541011 [patent_doc_number] => 20090222816 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'Data processing apparatus and method for controlling access to secure memory by virtual machines executing on processing circuirty' [patent_app_type] => utility [patent_app_number] => 12/379082 [patent_app_country] => US [patent_app_date] => 2009-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9183 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20090222816.pdf [firstpage_image] =>[orig_patent_app_number] => 12379082 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/379082
Data processing apparatus and method for controlling access to secure memory by virtual machines executing on processing circuirty Feb 11, 2009 Issued
Array ( [id] => 10879583 [patent_doc_number] => 08904381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-02 [patent_title] => 'User defined data partitioning (UDP)—grouping of data based on computation model' [patent_app_type] => utility [patent_app_number] => 12/358995 [patent_app_country] => US [patent_app_date] => 2009-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 7053 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12358995 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/358995
User defined data partitioning (UDP)—grouping of data based on computation model Jan 22, 2009 Issued
Array ( [id] => 8170668 [patent_doc_number] => 08176297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Adaptive fetch advance control for a low power processor' [patent_app_type] => utility [patent_app_number] => 12/347848 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3861 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/176/08176297.pdf [firstpage_image] =>[orig_patent_app_number] => 12347848 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347848
Adaptive fetch advance control for a low power processor Dec 30, 2008 Issued
Array ( [id] => 6445434 [patent_doc_number] => 20100169622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-01 [patent_title] => 'PROCESSOR REGISTER RECOVERY AFTER FLUSH OPERATION' [patent_app_type] => utility [patent_app_number] => 12/347924 [patent_app_country] => US [patent_app_date] => 2008-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7731 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0169/20100169622.pdf [firstpage_image] =>[orig_patent_app_number] => 12347924 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/347924
Processor register recovery after flush operation Dec 30, 2008 Issued
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