Search

Douglas C. Butler

Examiner (ID: 16249)

Most Active Art Unit
3104
Art Unit(s)
2899, 3683, 3105, 3104, 3613, 3103
Total Applications
3087
Issued Applications
2757
Pending Applications
77
Abandoned Applications
253

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20139184 [patent_doc_number] => 20250246228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/422185 [patent_app_country] => US [patent_app_date] => 2024-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3223 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18422185 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/422185
MEMORY DEVICE Jan 24, 2024 Pending
Array ( [id] => 19788259 [patent_doc_number] => 20250061938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => MEMORY DEVICE INCLUDING SENSE AMPLIFIER AND METHOD OF STORING DATA THEREOF [patent_app_type] => utility [patent_app_number] => 18/421152 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8974 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421152 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/421152
MEMORY DEVICE INCLUDING SENSE AMPLIFIER AND METHOD OF STORING DATA THEREOF Jan 23, 2024 Pending
Array ( [id] => 19392478 [patent_doc_number] => 20240282348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => CURRENT DETECTOR AND INFORMATION PROCESSOR [patent_app_type] => utility [patent_app_number] => 18/421801 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421801 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/421801
CURRENT DETECTOR AND INFORMATION PROCESSOR Jan 23, 2024 Pending
Array ( [id] => 20124284 [patent_doc_number] => 20250239315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => NON-VOLATILE MEMORY WITH IN-PLACE ERROR UPDATING AND CORRECTION [patent_app_type] => utility [patent_app_number] => 18/419205 [patent_app_country] => US [patent_app_date] => 2024-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17805 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419205 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419205
NON-VOLATILE MEMORY WITH IN-PLACE ERROR UPDATING AND CORRECTION Jan 21, 2024 Pending
Array ( [id] => 19757786 [patent_doc_number] => 20250046351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => POWER EFFICIENT UNMATCHED DATA PATH ARCHITECTURE FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/414004 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414004 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414004
POWER EFFICIENT UNMATCHED DATA PATH ARCHITECTURE FOR NON-VOLATILE MEMORY Jan 15, 2024 Pending
Array ( [id] => 20102868 [patent_doc_number] => 20250232804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => MEMORY DEVICES WITH RC TRACKING AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/410739 [patent_app_country] => US [patent_app_date] => 2024-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1214 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18410739 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/410739
MEMORY DEVICES WITH RC TRACKING AND METHODS FOR OPERATING THE SAME Jan 10, 2024 Pending
Array ( [id] => 19305225 [patent_doc_number] => 20240233805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => REFERENCE POTENTIAL GENERATING CIRCUIT AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/407830 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2723 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407830 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407830
REFERENCE POTENTIAL GENERATING CIRCUIT AND CONTROL METHOD THEREOF Jan 8, 2024 Pending
Array ( [id] => 19835501 [patent_doc_number] => 20250087287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => MEMORY DEVICES WITH STACKING CIRCUITS AND METHODS OF OPERATING THEREOF [patent_app_type] => utility [patent_app_number] => 18/405953 [patent_app_country] => US [patent_app_date] => 2024-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13831 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18405953 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/405953
MEMORY DEVICES WITH STACKING CIRCUITS AND METHODS OF OPERATING THEREOF Jan 4, 2024 Pending
Array ( [id] => 19610783 [patent_doc_number] => 12159663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Recognition system and SRAM cell thereof [patent_app_type] => utility [patent_app_number] => 18/398145 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 2773 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398145 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/398145
Recognition system and SRAM cell thereof Dec 27, 2023 Issued
Array ( [id] => 19726911 [patent_doc_number] => 20250029662 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => POWER LOSS PROTECTION AND RESET SIGNAL GENERATION IN MEMORY SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/397773 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6722 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397773 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/397773
POWER LOSS PROTECTION AND RESET SIGNAL GENERATION IN MEMORY SYSTEMS Dec 26, 2023 Pending
Array ( [id] => 19305205 [patent_doc_number] => 20240233785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => MEMORY REFRESH [patent_app_type] => utility [patent_app_number] => 18/396186 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18396186 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/396186
MEMORY REFRESH Dec 25, 2023 Pending
Array ( [id] => 19757784 [patent_doc_number] => 20250046349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => MEMORY DEVICE FOR OUTPUTTING DATA AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/390293 [patent_app_country] => US [patent_app_date] => 2023-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18390293 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/390293
MEMORY DEVICE FOR OUTPUTTING DATA AND METHOD OF OPERATING THE SAME Dec 19, 2023 Pending
Array ( [id] => 19100782 [patent_doc_number] => 20240120010 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => ENHANCED GRADIENT SEEDING SCHEME DURING A PROGRAM OPERATION IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/545888 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18545888 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/545888
Enhanced gradient seeding scheme during a program operation in a memory sub-system Dec 18, 2023 Issued
Array ( [id] => 20146584 [patent_doc_number] => 12380930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-05 [patent_title] => Memory array decoding and interconnects [patent_app_type] => utility [patent_app_number] => 18/525136 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 89 [patent_no_of_words] => 39109 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525136 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/525136
Memory array decoding and interconnects Nov 29, 2023 Issued
Array ( [id] => 19828085 [patent_doc_number] => 12248870 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Neural network device [patent_app_type] => utility [patent_app_number] => 18/520500 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 8767 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520500 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520500
Neural network device Nov 26, 2023 Issued
Array ( [id] => 19174977 [patent_doc_number] => 20240160951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Control Simulation Method Based On Artificial Intelligence [patent_app_type] => utility [patent_app_number] => 18/506608 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18506608 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/506608
Control simulation method based on artificial intelligence Nov 9, 2023 Issued
Array ( [id] => 19515428 [patent_doc_number] => 20240347114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SERIAL INTERFACE RECEIVER AND AN OFFSET CALIBRATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/384927 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18384927 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/384927
SERIAL INTERFACE RECEIVER AND AN OFFSET CALIBRATION METHOD THEREOF Oct 29, 2023 Pending
Array ( [id] => 19406888 [patent_doc_number] => 20240290399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => FLASH MEMORY AND READ RECOVERY METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/495210 [patent_app_country] => US [patent_app_date] => 2023-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18495210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/495210
FLASH MEMORY AND READ RECOVERY METHOD THEREOF Oct 25, 2023 Pending
Array ( [id] => 20002108 [patent_doc_number] => 20250140330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => METHOD FOR ISOLATING FAULTY NAND TEMPERATURE SENSOR [patent_app_type] => utility [patent_app_number] => 18/383730 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1128 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18383730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/383730
METHOD FOR ISOLATING FAULTY NAND TEMPERATURE SENSOR Oct 24, 2023 Pending
Array ( [id] => 19174764 [patent_doc_number] => 20240160738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Detection of Anomalous Sequences of Commands to Memory Systems [patent_app_type] => utility [patent_app_number] => 18/487677 [patent_app_country] => US [patent_app_date] => 2023-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15300 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18487677 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/487677
Detection of Anomalous Sequences of Commands to Memory Systems Oct 15, 2023 Pending
Menu