Search

Douglas D. Watts

Examiner (ID: 17148)

Most Active Art Unit
3204
Art Unit(s)
3724, 3203, 3101, 2899, 2902, 3204, 3103, 3105, 3727
Total Applications
2654
Issued Applications
2350
Pending Applications
81
Abandoned Applications
222

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7784322 [patent_doc_number] => 20120045878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-23 [patent_title] => 'MANUFACTURE OF SEMICONDUCTOR DEVICE WITH STRESS STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/283331 [patent_app_country] => US [patent_app_date] => 2011-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6119 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20120045878.pdf [firstpage_image] =>[orig_patent_app_number] => 13283331 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/283331
Manufacture of semiconductor device with stress structure Oct 26, 2011 Issued
Array ( [id] => 8159360 [patent_doc_number] => 20120100679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-26 [patent_title] => 'THICK GATE OXIDE FOR LDMOS AND DEMOS' [patent_app_type] => utility [patent_app_number] => 13/274698 [patent_app_country] => US [patent_app_date] => 2011-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3946 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20120100679.pdf [firstpage_image] =>[orig_patent_app_number] => 13274698 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/274698
Thick gate oxide for LDMOS and DEMOS Oct 16, 2011 Issued
Array ( [id] => 8277951 [patent_doc_number] => 20120171826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-05 [patent_title] => 'METHOD OF FABRICATING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/243147 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8084 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243147 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/243147
Method of fabricating semiconductor device Sep 22, 2011 Issued
Array ( [id] => 8733205 [patent_doc_number] => 20130078774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'METHOD FOR FORMING DOPE REGIONS WITH RAPID THERMAL PROCESS' [patent_app_type] => utility [patent_app_number] => 13/240931 [patent_app_country] => US [patent_app_date] => 2011-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2220 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13240931 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/240931
METHOD FOR FORMING DOPE REGIONS WITH RAPID THERMAL PROCESS Sep 21, 2011 Abandoned
Array ( [id] => 9401590 [patent_doc_number] => 08691642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'Method of fabricating semiconductor device including forming epitaxial blocking layers by nitridation process' [patent_app_type] => utility [patent_app_number] => 13/238611 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4878 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13238611 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/238611
Method of fabricating semiconductor device including forming epitaxial blocking layers by nitridation process Sep 20, 2011 Issued
Array ( [id] => 7711284 [patent_doc_number] => 20120003830 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'METHOD FOR MANUFACTURE OF INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PROTECTED CONDUCTIVE LAYERS FOR PADS' [patent_app_type] => utility [patent_app_number] => 13/233402 [patent_app_country] => US [patent_app_date] => 2011-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6198 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13233402 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/233402
Method for manufacture of integrated circuit package system with protected conductive layers for pads Sep 14, 2011 Issued
Array ( [id] => 8708078 [patent_doc_number] => 20130065367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'Methods of Forming Highly Scaled Semiconductor Devices Using a Reduced Number of Spacers' [patent_app_type] => utility [patent_app_number] => 13/231470 [patent_app_country] => US [patent_app_date] => 2011-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5731 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13231470 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/231470
Methods of Forming Highly Scaled Semiconductor Devices Using a Reduced Number of Spacers Sep 12, 2011 Abandoned
Array ( [id] => 9827742 [patent_doc_number] => 08936970 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-20 [patent_title] => 'Light emitting structure having electrodes and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/227841 [patent_app_country] => US [patent_app_date] => 2011-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 37 [patent_no_of_words] => 5073 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13227841 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/227841
Light emitting structure having electrodes and manufacturing method thereof Sep 7, 2011 Issued
Array ( [id] => 9869725 [patent_doc_number] => 08957499 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-17 [patent_title] => 'Laminate stacked capacitor, circuit substrate with laminate stacked capacitor and semiconductor apparatus with laminate stacked capacitor' [patent_app_type] => utility [patent_app_number] => 13/228091 [patent_app_country] => US [patent_app_date] => 2011-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 35 [patent_no_of_words] => 10250 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13228091 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/228091
Laminate stacked capacitor, circuit substrate with laminate stacked capacitor and semiconductor apparatus with laminate stacked capacitor Sep 7, 2011 Issued
Array ( [id] => 8705443 [patent_doc_number] => 20130062732 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'INTERCONNECT STRUCTURES WITH FUNCTIONAL COMPONENTS AND METHODS FOR FABRICATION' [patent_app_type] => utility [patent_app_number] => 13/228023 [patent_app_country] => US [patent_app_date] => 2011-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8014 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13228023 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/228023
INTERCONNECT STRUCTURES WITH FUNCTIONAL COMPONENTS AND METHODS FOR FABRICATION Sep 7, 2011 Abandoned
Array ( [id] => 9763046 [patent_doc_number] => 08847374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Power semiconductor module and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/818490 [patent_app_country] => US [patent_app_date] => 2011-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11638 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13818490 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/818490
Power semiconductor module and manufacturing method thereof Sep 4, 2011 Issued
Array ( [id] => 8882875 [patent_doc_number] => 20130156058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'LIGHT EMITTING DEVICE, AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/820372 [patent_app_country] => US [patent_app_date] => 2011-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 14056 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13820372 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/820372
Light emitting device including lead having terminal part and exposed part, and method for manufacturing the same Aug 31, 2011 Issued
Array ( [id] => 7665079 [patent_doc_number] => 20110314348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'SCAN TESTING USING SCAN FRAMES WITH EMBEDDED COMMANDS' [patent_app_type] => utility [patent_app_number] => 13/217851 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9633 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217851 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217851
Scan paths, stimulus, and header circuitry with command/frame marker outputs Aug 24, 2011 Issued
Array ( [id] => 8668522 [patent_doc_number] => 20130043060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'METHOD FOR FORMING CORELESS FLIP CHIP BALL GRID ARRAY (FCBGA) SUBSTRATES AND SUCH SUBSTRATES FORMED BY THE METHOD' [patent_app_type] => utility [patent_app_number] => 13/212489 [patent_app_country] => US [patent_app_date] => 2011-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1523 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13212489 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/212489
Method for forming coreless flip chip ball grid array (FCBGA) substrates and such substrates formed by the method Aug 17, 2011 Issued
Array ( [id] => 8578225 [patent_doc_number] => 08344436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Semiconductor constructions and electronic systems' [patent_app_type] => utility [patent_app_number] => 13/196761 [patent_app_country] => US [patent_app_date] => 2011-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 5845 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13196761 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/196761
Semiconductor constructions and electronic systems Aug 1, 2011 Issued
Array ( [id] => 7586880 [patent_doc_number] => 20110281390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-17 [patent_title] => 'SILICON/GERMANIUM OXIDE PARTICLE INKS AND PROCESSES FOR FORMING SOLAR CELL COMPONENTS AND FOR FORMING OPTICAL COMPONENTS' [patent_app_type] => utility [patent_app_number] => 13/191392 [patent_app_country] => US [patent_app_date] => 2011-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 12731 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20110281390.pdf [firstpage_image] =>[orig_patent_app_number] => 13191392 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/191392
Silicon/germanium oxide particle inks and processes for forming solar cell components and for forming optical components Jul 25, 2011 Issued
Array ( [id] => 9469671 [patent_doc_number] => 08723306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-13 [patent_title] => 'Power semiconductor unit, power module, power semiconductor unit manufacturing method, and power module manufacturing method' [patent_app_type] => utility [patent_app_number] => 13/811722 [patent_app_country] => US [patent_app_date] => 2011-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 16567 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13811722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/811722
Power semiconductor unit, power module, power semiconductor unit manufacturing method, and power module manufacturing method Jul 24, 2011 Issued
Array ( [id] => 7561353 [patent_doc_number] => 20110275186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'FABRICATING AND OPERATING A MEMORY ARRAY HAVING A MULTI-LEVEL CELL REGION AND A SINGLE-LEVEL CELL REGION' [patent_app_type] => utility [patent_app_number] => 13/187399 [patent_app_country] => US [patent_app_date] => 2011-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18912 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0275/20110275186.pdf [firstpage_image] =>[orig_patent_app_number] => 13187399 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/187399
Fabricating and operating a memory array having a multi-level cell region and a single-level cell region Jul 19, 2011 Issued
Array ( [id] => 8749382 [patent_doc_number] => 08415213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Method of manufacturing semiconductor device with offset sidewall structure' [patent_app_type] => utility [patent_app_number] => 13/185624 [patent_app_country] => US [patent_app_date] => 2011-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 46 [patent_no_of_words] => 12142 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 470 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13185624 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/185624
Method of manufacturing semiconductor device with offset sidewall structure Jul 18, 2011 Issued
Array ( [id] => 10604391 [patent_doc_number] => 09324964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Organic light-emitting element with hole injection layer having concave portion' [patent_app_type] => utility [patent_app_number] => 14/128727 [patent_app_country] => US [patent_app_date] => 2011-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 61 [patent_no_of_words] => 38120 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14128727 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/128727
Organic light-emitting element with hole injection layer having concave portion Jul 14, 2011 Issued
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