Search

Douglas King

Examiner (ID: 126, Phone: (571)272-2311 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
970
Issued Applications
746
Pending Applications
78
Abandoned Applications
170

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18142907 [patent_doc_number] => 20230016751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => APPARATUS AND METHOD FOR HARDWARE METERING USING MEMORY-TYPE CAMOUFLAGED CELL [patent_app_type] => utility [patent_app_number] => 17/501910 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501910 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501910
Apparatus and method for hardware metering using memory-type camouflaged cell Oct 13, 2021 Issued
Array ( [id] => 17691854 [patent_doc_number] => 20220199147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => MEMORY ARRAY WITH REDUCED LEAKAGE CURRENT [patent_app_type] => utility [patent_app_number] => 17/497483 [patent_app_country] => US [patent_app_date] => 2021-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17497483 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/497483
Memory array with reduced leakage current Oct 7, 2021 Issued
Array ( [id] => 17373416 [patent_doc_number] => 20220028468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/495655 [patent_app_country] => US [patent_app_date] => 2021-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495655 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/495655
Memory device and memory system Oct 5, 2021 Issued
Array ( [id] => 19062056 [patent_doc_number] => 11941292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Memory system and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/493657 [patent_app_country] => US [patent_app_date] => 2021-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4643 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17493657 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/493657
Memory system and operating method thereof Oct 3, 2021 Issued
Array ( [id] => 18803208 [patent_doc_number] => 11836366 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Memory system and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/490589 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 12779 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490589 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/490589
Memory system and method of operating the same Sep 29, 2021 Issued
Array ( [id] => 18282432 [patent_doc_number] => 20230097904 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => LOW PROGRAM VOLTAGE FLASH MEMORY CELLS WITH EMBEDDED HEATER IN THE CONTROL GATE [patent_app_type] => utility [patent_app_number] => 17/449354 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5297 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17449354 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/449354
Low program voltage flash memory cells with embedded heater in the control gate Sep 28, 2021 Issued
Array ( [id] => 17485683 [patent_doc_number] => 20220093187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => MEMORY SYSTEM AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 17/464898 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17464898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/464898
MEMORY SYSTEM AND CONTROL METHOD Sep 1, 2021 Abandoned
Array ( [id] => 20134172 [patent_doc_number] => 12376504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Embedded backside PCRAM device structure [patent_app_type] => utility [patent_app_number] => 17/461548 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 6755 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461548 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461548
Embedded backside PCRAM device structure Aug 29, 2021 Issued
Array ( [id] => 17476345 [patent_doc_number] => 20220083849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => SWITCHING CIRCUIT AND STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/461093 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461093
SWITCHING CIRCUIT AND STORAGE DEVICE Aug 29, 2021 Pending
Array ( [id] => 17295184 [patent_doc_number] => 20210391023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/460954 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13453 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460954 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460954
Non-volatile memory device Aug 29, 2021 Issued
Array ( [id] => 18431431 [patent_doc_number] => 11676658 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Orthogonal dual port RAM (ORAM) [patent_app_type] => utility [patent_app_number] => 17/409060 [patent_app_country] => US [patent_app_date] => 2021-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4936 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 316 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17409060 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/409060
Orthogonal dual port RAM (ORAM) Aug 22, 2021 Issued
Array ( [id] => 18359259 [patent_doc_number] => 11647679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-09 [patent_title] => Logic computing [patent_app_type] => utility [patent_app_number] => 17/395015 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 22563 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395015 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395015
Logic computing Aug 4, 2021 Issued
Array ( [id] => 19581666 [patent_doc_number] => 12147784 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Compute in memory [patent_app_type] => utility [patent_app_number] => 17/387598 [patent_app_country] => US [patent_app_date] => 2021-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 7272 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17387598 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/387598
Compute in memory Jul 27, 2021 Issued
Array ( [id] => 18578714 [patent_doc_number] => 11735253 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-22 [patent_title] => Apparatus and methods for programming memory cells responsive to an indication of age of the memory cells [patent_app_type] => utility [patent_app_number] => 17/377566 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 11569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17377566 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/377566
Apparatus and methods for programming memory cells responsive to an indication of age of the memory cells Jul 15, 2021 Issued
Array ( [id] => 18645488 [patent_doc_number] => 11769566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-26 [patent_title] => Programming codewords for error correction operations to memory [patent_app_type] => utility [patent_app_number] => 17/366988 [patent_app_country] => US [patent_app_date] => 2021-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 7825 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17366988 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/366988
Programming codewords for error correction operations to memory Jul 1, 2021 Issued
Array ( [id] => 18016147 [patent_doc_number] => 11508450 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-11-22 [patent_title] => Dual time domain control for dynamic staggering [patent_app_type] => utility [patent_app_number] => 17/351455 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 18278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351455 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/351455
Dual time domain control for dynamic staggering Jun 17, 2021 Issued
Array ( [id] => 18795502 [patent_doc_number] => 11829281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-28 [patent_title] => Semi receiver side write training for non-volatile memory system [patent_app_type] => utility [patent_app_number] => 17/348910 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 13037 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17348910 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/348910
Semi receiver side write training for non-volatile memory system Jun 15, 2021 Issued
Array ( [id] => 19979989 [patent_doc_number] => 12347475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Memory device and method of operating a voltage-controlled magnetic anisotropy (VCMA) magnetic tunnel junction (MTJ) device [patent_app_type] => utility [patent_app_number] => 17/344796 [patent_app_country] => US [patent_app_date] => 2021-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 33 [patent_no_of_words] => 5633 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17344796 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/344796
Memory device and method of operating a voltage-controlled magnetic anisotropy (VCMA) magnetic tunnel junction (MTJ) device Jun 9, 2021 Issued
Array ( [id] => 18890808 [patent_doc_number] => 11869585 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Segregation-based memory [patent_app_type] => utility [patent_app_number] => 17/331610 [patent_app_country] => US [patent_app_date] => 2021-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 18330 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17331610 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/331610
Segregation-based memory May 25, 2021 Issued
Array ( [id] => 18669735 [patent_doc_number] => 11776645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Stacked electronic device capable of retaining an analog potential [patent_app_type] => utility [patent_app_number] => 17/314554 [patent_app_country] => US [patent_app_date] => 2021-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 46 [patent_no_of_words] => 19916 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314554 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/314554
Stacked electronic device capable of retaining an analog potential May 6, 2021 Issued
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