Search

Douglas King

Examiner (ID: 15404, Phone: (571)272-2311 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
1004
Issued Applications
774
Pending Applications
71
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13846287 [patent_doc_number] => 20190026628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/899390 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8553 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15899390 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/899390
Semiconductor device Feb 19, 2018 Issued
Array ( [id] => 13451343 [patent_doc_number] => 20180277214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => STORAGE DEVICE AND STORAGE METHOD [patent_app_type] => utility [patent_app_number] => 15/900516 [patent_app_country] => US [patent_app_date] => 2018-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12466 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15900516 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/900516
Storage device and storage method Feb 19, 2018 Issued
Array ( [id] => 14753271 [patent_doc_number] => 20190259809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => INTEGRATED CIRCUITS INCLUDING MAGNETIC RANDOM ACCESS MEMORY STRUCTURES HAVING REDUCED SWITCHING ENERGY BARRIERS FOR DUAL BIT OPERATION AND METHODS FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/898555 [patent_app_country] => US [patent_app_date] => 2018-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15898555 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/898555
Integrated circuits including magnetic random access memory structures having reduced switching energy barriers for dual bit operation and methods for fabricating the same Feb 16, 2018 Issued
Array ( [id] => 15856757 [patent_doc_number] => 10643671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/897596 [patent_app_country] => US [patent_app_date] => 2018-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 9579 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15897596 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/897596
Semiconductor device Feb 14, 2018 Issued
Array ( [id] => 13845123 [patent_doc_number] => 20190026046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => MEMORY SYSTEM AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/893821 [patent_app_country] => US [patent_app_date] => 2018-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12264 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15893821 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/893821
Memory system and method of operating the same Feb 11, 2018 Issued
Array ( [id] => 13282923 [patent_doc_number] => 10153052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Flash command that reports a count of cell program failures [patent_app_type] => utility [patent_app_number] => 15/889536 [patent_app_country] => US [patent_app_date] => 2018-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6343 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15889536 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/889536
Flash command that reports a count of cell program failures Feb 5, 2018 Issued
Array ( [id] => 14378913 [patent_doc_number] => 20190163369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => LOGICAL GROUPING FOR HYBRID DUAL WRITE [patent_app_type] => utility [patent_app_number] => 15/885767 [patent_app_country] => US [patent_app_date] => 2018-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12966 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15885767 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/885767
Logical grouping for hybrid dual write Jan 30, 2018 Issued
Array ( [id] => 14706613 [patent_doc_number] => 10381064 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-08-13 [patent_title] => Apparatuses and methods for refreshing memory of a semiconductor device [patent_app_type] => utility [patent_app_number] => 15/875985 [patent_app_country] => US [patent_app_date] => 2018-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7419 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15875985 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/875985
Apparatuses and methods for refreshing memory of a semiconductor device Jan 18, 2018 Issued
Array ( [id] => 13666635 [patent_doc_number] => 10163489 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => 3D structure for advanced SRAM design to avoid half-selected issue [patent_app_type] => utility [patent_app_number] => 15/865923 [patent_app_country] => US [patent_app_date] => 2018-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4258 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15865923 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/865923
3D structure for advanced SRAM design to avoid half-selected issue Jan 8, 2018 Issued
Array ( [id] => 14572949 [patent_doc_number] => 20190214082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-11 [patent_title] => HIGH SPEED THIN FILM TWO TERMINAL RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 15/864213 [patent_app_country] => US [patent_app_date] => 2018-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5652 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15864213 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/864213
HIGH SPEED THIN FILM TWO TERMINAL RESISTIVE MEMORY Jan 7, 2018 Abandoned
Array ( [id] => 14644005 [patent_doc_number] => 10366750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Nonvolatile memory device [patent_app_type] => utility [patent_app_number] => 15/861701 [patent_app_country] => US [patent_app_date] => 2018-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 5240 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 381 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15861701 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/861701
Nonvolatile memory device Jan 3, 2018 Issued
Array ( [id] => 14252033 [patent_doc_number] => 10276223 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Memory device for generating word line signals having varying pulse widths [patent_app_type] => utility [patent_app_number] => 15/860767 [patent_app_country] => US [patent_app_date] => 2018-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 8245 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15860767 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/860767
Memory device for generating word line signals having varying pulse widths Jan 2, 2018 Issued
Array ( [id] => 13847479 [patent_doc_number] => 20190027224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-24 [patent_title] => VOLTAGE GENERATOR FOR A NONVOLATILE MEMORY DEVICE, AND A METHOD OF OPERATING THE VOLTAGE GENERATOR [patent_app_type] => utility [patent_app_number] => 15/860891 [patent_app_country] => US [patent_app_date] => 2018-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15860891 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/860891
Voltage generator for a nonvolatile memory device, and a method of operating the voltage generator Jan 2, 2018 Issued
Array ( [id] => 15233755 [patent_doc_number] => 10504606 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-10 [patent_title] => Memory device and operating method thereof [patent_app_type] => utility [patent_app_number] => 15/859851 [patent_app_country] => US [patent_app_date] => 2018-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 21 [patent_no_of_words] => 16508 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859851 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859851
Memory device and operating method thereof Jan 1, 2018 Issued
Array ( [id] => 14035943 [patent_doc_number] => 10229724 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-03-12 [patent_title] => Microwave write-assist in series-interconnected orthogonal STT-MRAM devices [patent_app_type] => utility [patent_app_number] => 15/859517 [patent_app_country] => US [patent_app_date] => 2017-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 20747 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 537 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15859517 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/859517
Microwave write-assist in series-interconnected orthogonal STT-MRAM devices Dec 29, 2017 Issued
Array ( [id] => 14541749 [patent_doc_number] => 20190206496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => NAND FLASH MEMORY AND METHOD FOR DESTROYING INFORMATION FROM THE NAND FLASH MEMORY [patent_app_type] => utility [patent_app_number] => 15/857643 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3195 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857643 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857643
NAND flash memory and method for destroying information from the NAND flash memory Dec 28, 2017 Issued
Array ( [id] => 14541667 [patent_doc_number] => 20190206455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => TECHNIQUES FOR PRECHARGING A MEMORY CELL [patent_app_type] => utility [patent_app_number] => 15/857091 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17385 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857091 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857091
Techniques for precharging a memory cell Dec 27, 2017 Issued
Array ( [id] => 16064801 [patent_doc_number] => 10691346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Read operation method of nonvolatile memory, memory system including the nonvolatile memory, and operation method of the memory system [patent_app_type] => utility [patent_app_number] => 15/846473 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 12608 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15846473 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/846473
Read operation method of nonvolatile memory, memory system including the nonvolatile memory, and operation method of the memory system Dec 18, 2017 Issued
Array ( [id] => 14798225 [patent_doc_number] => 10402116 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Systems and methods for writing zeros to a memory array [patent_app_type] => utility [patent_app_number] => 15/837685 [patent_app_country] => US [patent_app_date] => 2017-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6581 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15837685 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/837685
Systems and methods for writing zeros to a memory array Dec 10, 2017 Issued
Array ( [id] => 13434757 [patent_doc_number] => 20180268921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/824068 [patent_app_country] => US [patent_app_date] => 2017-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11030 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15824068 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/824068
Nonvolatile memory device and memory system including the same Nov 27, 2017 Issued
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