Search

Douglas King

Examiner (ID: 15404, Phone: (571)272-2311 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
1004
Issued Applications
774
Pending Applications
71
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13173591 [patent_doc_number] => 10102915 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Semiconductor device including nonvolatile memory configured to switch between a reference current reading system and a complimentary reading system [patent_app_type] => utility [patent_app_number] => 15/802277 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 37 [patent_no_of_words] => 22917 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 584 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802277 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802277
Semiconductor device including nonvolatile memory configured to switch between a reference current reading system and a complimentary reading system Nov 1, 2017 Issued
Array ( [id] => 13950307 [patent_doc_number] => 10210932 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-19 [patent_title] => Electronic device with semiconductor memory having variable resistance elements for storing data and associated driving circuitry [patent_app_type] => utility [patent_app_number] => 15/802244 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 18741 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 477 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802244 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802244
Electronic device with semiconductor memory having variable resistance elements for storing data and associated driving circuitry Nov 1, 2017 Issued
Array ( [id] => 16881248 [patent_doc_number] => 11031405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Peripheral logic circuits under DRAM memory arrays [patent_app_type] => utility [patent_app_number] => 15/802016 [patent_app_country] => US [patent_app_date] => 2017-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5346 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15802016 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/802016
Peripheral logic circuits under DRAM memory arrays Nov 1, 2017 Issued
Array ( [id] => 16865617 [patent_doc_number] => 11024368 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Semiconductor circuit and semiconductor circuit system [patent_app_type] => utility [patent_app_number] => 16/347448 [patent_app_country] => US [patent_app_date] => 2017-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 80 [patent_no_of_words] => 29203 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16347448 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/347448
Semiconductor circuit and semiconductor circuit system Oct 31, 2017 Issued
Array ( [id] => 14616569 [patent_doc_number] => 10360988 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-23 [patent_title] => Apparatus and methods for protection against inadvertent programming of fuse cells [patent_app_type] => utility [patent_app_number] => 15/798786 [patent_app_country] => US [patent_app_date] => 2017-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 30 [patent_no_of_words] => 18099 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15798786 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/798786
Apparatus and methods for protection against inadvertent programming of fuse cells Oct 30, 2017 Issued
Array ( [id] => 12758830 [patent_doc_number] => 20180144778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => SENSE AMPLIFIER DRIVING DEVICE [patent_app_type] => utility [patent_app_number] => 15/794803 [patent_app_country] => US [patent_app_date] => 2017-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15794803 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/794803
Sense amplifier driving device Oct 25, 2017 Issued
Array ( [id] => 14525459 [patent_doc_number] => 10340000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-02 [patent_title] => Operating method of memory device [patent_app_type] => utility [patent_app_number] => 15/795245 [patent_app_country] => US [patent_app_date] => 2017-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5574 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15795245 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/795245
Operating method of memory device Oct 25, 2017 Issued
Array ( [id] => 13570779 [patent_doc_number] => 20180336937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 15/793427 [patent_app_country] => US [patent_app_date] => 2017-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15793427 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/793427
Semiconductor devices Oct 24, 2017 Issued
Array ( [id] => 12691804 [patent_doc_number] => 20180122434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 15/792973 [patent_app_country] => US [patent_app_date] => 2017-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6325 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15792973 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/792973
Memory device and memory system including the same Oct 24, 2017 Issued
Array ( [id] => 12534216 [patent_doc_number] => 10008262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Memory and electronic device including the same [patent_app_type] => utility [patent_app_number] => 15/789073 [patent_app_country] => US [patent_app_date] => 2017-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 11299 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15789073 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/789073
Memory and electronic device including the same Oct 19, 2017 Issued
Array ( [id] => 13282925 [patent_doc_number] => 10153053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-11 [patent_title] => Fusible link cell with dual bit storage [patent_app_type] => utility [patent_app_number] => 15/787905 [patent_app_country] => US [patent_app_date] => 2017-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5619 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15787905 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/787905
Fusible link cell with dual bit storage Oct 18, 2017 Issued
Array ( [id] => 16172599 [patent_doc_number] => 10714175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Method, system and device for testing correlated electron switch (CES) devices [patent_app_type] => utility [patent_app_number] => 15/729419 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7949 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729419 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/729419
Method, system and device for testing correlated electron switch (CES) devices Oct 9, 2017 Issued
Array ( [id] => 14163541 [patent_doc_number] => 20190108873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-11 [patent_title] => INTEGRATED CIRCUITS INCLUDING A STATIC RANDOM ACCESS MEMORY CELL HAVING ENHANCED READ/WRITE PERFORMANCE, METHODS OF FORMING THE INTEGRATED CIRCUITS, AND METHODS OF OPERATING THE INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 15/729067 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4176 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15729067 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/729067
INTEGRATED CIRCUITS INCLUDING A STATIC RANDOM ACCESS MEMORY CELL HAVING ENHANCED READ/WRITE PERFORMANCE, METHODS OF FORMING THE INTEGRATED CIRCUITS, AND METHODS OF OPERATING THE INTEGRATED CIRCUITS Oct 9, 2017 Abandoned
Array ( [id] => 14135743 [patent_doc_number] => 20190102261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => CIRCUIT AND METHOD FOR STORING INFORMATION IN NON-VOLATILE MEMORY DURING A LOSS OF POWER EVENT [patent_app_type] => utility [patent_app_number] => 15/720533 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15720533 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/720533
Circuit and method for storing information in non-volatile memory during a loss of power event Sep 28, 2017 Issued
Array ( [id] => 14025981 [patent_doc_number] => 20190074984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => DETECTING UNRELIABLE BITS IN TRANSISTOR CIRCUITRY [patent_app_type] => utility [patent_app_number] => 15/694809 [patent_app_country] => US [patent_app_date] => 2017-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15694809 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/694809
DETECTING UNRELIABLE BITS IN TRANSISTOR CIRCUITRY Sep 2, 2017 Abandoned
Array ( [id] => 14332543 [patent_doc_number] => 10297295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 15/692381 [patent_app_country] => US [patent_app_date] => 2017-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 6678 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15692381 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/692381
Semiconductor memory device Aug 30, 2017 Issued
Array ( [id] => 13992347 [patent_doc_number] => 20190065331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => FLASH MEMORY BLOCK RETIREMENT POLICY [patent_app_type] => utility [patent_app_number] => 15/690903 [patent_app_country] => US [patent_app_date] => 2017-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13003 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15690903 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/690903
Flash memory block retirement policy Aug 29, 2017 Issued
Array ( [id] => 12553494 [patent_doc_number] => 10014053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-03 [patent_title] => Methods for backup sequence using three transistor memory cell devices [patent_app_type] => utility [patent_app_number] => 15/675836 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15675836 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/675836
Methods for backup sequence using three transistor memory cell devices Aug 13, 2017 Issued
Array ( [id] => 14827433 [patent_doc_number] => 10410727 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Non-volatile memories and data reading methods thereof [patent_app_type] => utility [patent_app_number] => 15/641781 [patent_app_country] => US [patent_app_date] => 2017-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10569 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 548 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15641781 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/641781
Non-volatile memories and data reading methods thereof Jul 4, 2017 Issued
Array ( [id] => 14671549 [patent_doc_number] => 10373689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => Semiconductor memory device and method of operating the same [patent_app_type] => utility [patent_app_number] => 15/641485 [patent_app_country] => US [patent_app_date] => 2017-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11199 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15641485 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/641485
Semiconductor memory device and method of operating the same Jul 4, 2017 Issued
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