
Douglas King
Examiner (ID: 15404, Phone: (571)272-2311 , Office: P/2824 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2824 |
| Total Applications | 1004 |
| Issued Applications | 774 |
| Pending Applications | 71 |
| Abandoned Applications | 171 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 13201093
[patent_doc_number] => 10115467
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-30
[patent_title] => One time accessible (OTA) non-volatile memory
[patent_app_type] => utility
[patent_app_number] => 14/865971
[patent_app_country] => US
[patent_app_date] => 2015-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3561
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14865971
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/865971 | One time accessible (OTA) non-volatile memory | Sep 24, 2015 | Issued |
Array
(
[id] => 11802134
[patent_doc_number] => 09543026
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-10
[patent_title] => 'Nonvolatile memory device and operating method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/865275
[patent_app_country] => US
[patent_app_date] => 2015-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8458
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14865275
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/865275 | Nonvolatile memory device and operating method thereof | Sep 24, 2015 | Issued |
Array
(
[id] => 11524299
[patent_doc_number] => 09607709
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-28
[patent_title] => 'Voltage generator, semiconductor memory device having the same, and method of operating semiconductor memory device'
[patent_app_type] => utility
[patent_app_number] => 14/865562
[patent_app_country] => US
[patent_app_date] => 2015-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 3839
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14865562
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/865562 | Voltage generator, semiconductor memory device having the same, and method of operating semiconductor memory device | Sep 24, 2015 | Issued |
Array
(
[id] => 11273510
[patent_doc_number] => 20160336058
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-11-17
[patent_title] => 'SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/863092
[patent_app_country] => US
[patent_app_date] => 2015-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4069
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863092
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/863092 | Semiconductor device and semiconductor system including the same | Sep 22, 2015 | Issued |
Array
(
[id] => 11117868
[patent_doc_number] => 20160314842
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-27
[patent_title] => 'MEMORY SYSTEM AND OPERATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/862955
[patent_app_country] => US
[patent_app_date] => 2015-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 11266
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14862955
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/862955 | Memory system and operating method thereof | Sep 22, 2015 | Issued |
Array
(
[id] => 18688155
[patent_doc_number] => 11783898
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-10
[patent_title] => Ephemeral storage elements, circuits, and systems
[patent_app_type] => utility
[patent_app_number] => 14/857275
[patent_app_country] => US
[patent_app_date] => 2015-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 11121
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14857275
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/857275 | Ephemeral storage elements, circuits, and systems | Sep 16, 2015 | Issued |
Array
(
[id] => 12047158
[patent_doc_number] => 09824766
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-11-21
[patent_title] => 'Semiconductor device including nonvolatile memory configured to switch between a reference current reading system and a complementary reading system'
[patent_app_type] => utility
[patent_app_number] => 14/843848
[patent_app_country] => US
[patent_app_date] => 2015-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 37
[patent_no_of_words] => 24591
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 368
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14843848
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/843848 | Semiconductor device including nonvolatile memory configured to switch between a reference current reading system and a complementary reading system | Sep 1, 2015 | Issued |
Array
(
[id] => 10725417
[patent_doc_number] => 20160071565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-10
[patent_title] => 'Memory Circuits and a Method for Forming a Memory Circuit'
[patent_app_type] => utility
[patent_app_number] => 14/843484
[patent_app_country] => US
[patent_app_date] => 2015-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 9988
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14843484
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/843484 | Memory circuits and a method for forming a memory circuit | Sep 1, 2015 | Issued |
Array
(
[id] => 10717912
[patent_doc_number] => 20160064060
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-03
[patent_title] => 'METHOD OF FORMING A MAGNETIC DOMAIN WALL IN A NANOWIRE'
[patent_app_type] => utility
[patent_app_number] => 14/843918
[patent_app_country] => US
[patent_app_date] => 2015-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3528
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14843918
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/843918 | METHOD OF FORMING A MAGNETIC DOMAIN WALL IN A NANOWIRE | Sep 1, 2015 | Abandoned |
Array
(
[id] => 14482221
[patent_doc_number] => 10327867
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-06-25
[patent_title] => Arch form placement for dental restoration design
[patent_app_type] => utility
[patent_app_number] => 14/834299
[patent_app_country] => US
[patent_app_date] => 2015-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 34
[patent_no_of_words] => 12748
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14834299
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/834299 | Arch form placement for dental restoration design | Aug 23, 2015 | Issued |
Array
(
[id] => 10717916
[patent_doc_number] => 20160064063
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-03
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/817777
[patent_app_country] => US
[patent_app_date] => 2015-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8285
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14817777
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/817777 | Semiconductor device | Aug 3, 2015 | Issued |
Array
(
[id] => 11028459
[patent_doc_number] => 20160225415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-08-04
[patent_title] => 'SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/816905
[patent_app_country] => US
[patent_app_date] => 2015-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6289
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14816905
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/816905 | SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF | Aug 2, 2015 | Abandoned |
Array
(
[id] => 13110791
[patent_doc_number] => 10074050
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-11
[patent_title] => Memristive neuromorphic circuit and method for training the memristive neuromorphic circuit
[patent_app_type] => utility
[patent_app_number] => 14/797266
[patent_app_country] => US
[patent_app_date] => 2015-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 9531
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14797266
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/797266 | Memristive neuromorphic circuit and method for training the memristive neuromorphic circuit | Jul 12, 2015 | Issued |
Array
(
[id] => 10417917
[patent_doc_number] => 20150302927
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-22
[patent_title] => 'NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/788109
[patent_app_country] => US
[patent_app_date] => 2015-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 14123
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14788109
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/788109 | Nonvolatile memory devices, operating methods thereof and memory systems including the same | Jun 29, 2015 | Issued |
Array
(
[id] => 15546027
[patent_doc_number] => 10572799
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-02-25
[patent_title] => Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models
[patent_app_type] => utility
[patent_app_number] => 14/749331
[patent_app_country] => US
[patent_app_date] => 2015-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 6597
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14749331
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/749331 | Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models | Jun 23, 2015 | Issued |
Array
(
[id] => 11314533
[patent_doc_number] => 20160350643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-01
[patent_title] => 'NEURON PERIPHERAL CIRCUITS FOR NEUROMORPHIC SYNAPTIC MEMORY ARRAY BASED ON NEURON MODELS'
[patent_app_type] => utility
[patent_app_number] => 14/722008
[patent_app_country] => US
[patent_app_date] => 2015-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6838
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722008
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/722008 | Neuron peripheral circuits for neuromorphic synaptic memory array based on neuron models | May 25, 2015 | Issued |
Array
(
[id] => 10315011
[patent_doc_number] => 20150200014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-16
[patent_title] => 'Controlling Dummy Word Line Bias During Erase In Non-Volatile Memory'
[patent_app_type] => utility
[patent_app_number] => 14/669267
[patent_app_country] => US
[patent_app_date] => 2015-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 13579
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14669267
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/669267 | Controlling dummy word line bias during erase in non-volatile memory | Mar 25, 2015 | Issued |
Array
(
[id] => 10309189
[patent_doc_number] => 20150194190
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-09
[patent_title] => 'METHOD AND APPARATUS FOR SWITCHING POWER IN A DUAL RAIL MEMORY'
[patent_app_type] => utility
[patent_app_number] => 14/659642
[patent_app_country] => US
[patent_app_date] => 2015-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5515
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14659642
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/659642 | Method and apparatus for switching power in a dual rail memory | Mar 16, 2015 | Issued |
Array
(
[id] => 10590392
[patent_doc_number] => 09312012
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-12
[patent_title] => 'EEPROM programming with first and second programming modes'
[patent_app_type] => utility
[patent_app_number] => 14/632785
[patent_app_country] => US
[patent_app_date] => 2015-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 10
[patent_no_of_words] => 3120
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14632785
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/632785 | EEPROM programming with first and second programming modes | Feb 25, 2015 | Issued |
Array
(
[id] => 10285751
[patent_doc_number] => 20150170749
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-06-18
[patent_title] => 'NONVOLATILE MEMORY DEVICES, OPERATING METHODS THEREOF AND MEMORY SYSTEMS INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/631341
[patent_app_country] => US
[patent_app_date] => 2015-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 43
[patent_figures_cnt] => 43
[patent_no_of_words] => 23900
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14631341
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/631341 | Nonvolatile memory devices, operating methods thereof and memory systems including the same | Feb 24, 2015 | Issued |