Search

Douglas King

Examiner (ID: 15404, Phone: (571)272-2311 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
1004
Issued Applications
774
Pending Applications
71
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8322700 [patent_doc_number] => 20120195109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'SEMICONDUCTOR STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 13/237251 [patent_app_country] => US [patent_app_date] => 2011-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7185 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13237251 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/237251
SEMICONDUCTOR STORAGE DEVICE Sep 19, 2011 Abandoned
Array ( [id] => 8039877 [patent_doc_number] => 20120069674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'FLASH MEMORY DEVICE AND RELATED PROGRAM VERIFICATION METHOD' [patent_app_type] => utility [patent_app_number] => 13/235533 [patent_app_country] => US [patent_app_date] => 2011-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5594 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20120069674.pdf [firstpage_image] =>[orig_patent_app_number] => 13235533 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/235533
Flash memory device and related program verification method Sep 18, 2011 Issued
Array ( [id] => 8626031 [patent_doc_number] => 08358530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-22 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/224563 [patent_app_country] => US [patent_app_date] => 2011-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 45 [patent_no_of_words] => 23707 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 339 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13224563 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/224563
Semiconductor device Sep 1, 2011 Issued
Array ( [id] => 8682858 [patent_doc_number] => 20130051142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'MEMORY WITH THREE TRANSISTOR MEMORY CELL DEVICE' [patent_app_type] => utility [patent_app_number] => 13/217867 [patent_app_country] => US [patent_app_date] => 2011-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3776 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13217867 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/217867
Memory with three transistor memory cell device Aug 24, 2011 Issued
Array ( [id] => 8702701 [patent_doc_number] => 08395928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Threshold device for a memory array' [patent_app_type] => utility [patent_app_number] => 13/206460 [patent_app_country] => US [patent_app_date] => 2011-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 60 [patent_no_of_words] => 17372 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13206460 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/206460
Threshold device for a memory array Aug 8, 2011 Issued
Array ( [id] => 8636203 [patent_doc_number] => 20130028006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'STATIC RANDOM ACCESS MEMORY STRUCTURE AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/190031 [patent_app_country] => US [patent_app_date] => 2011-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1759 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13190031 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/190031
Static random access memory structure and control method thereof Jul 24, 2011 Issued
Array ( [id] => 7740923 [patent_doc_number] => 20120020155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'MULTIPAGE PROGRAM SCHEME FOR FLASH MEMORY' [patent_app_type] => utility [patent_app_number] => 13/186789 [patent_app_country] => US [patent_app_date] => 2011-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 17907 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20120020155.pdf [firstpage_image] =>[orig_patent_app_number] => 13186789 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/186789
Multipage program scheme for flash memory Jul 19, 2011 Issued
Array ( [id] => 8847731 [patent_doc_number] => 08456921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-04 [patent_title] => 'Nonvolatile memory and operation method of the same' [patent_app_type] => utility [patent_app_number] => 13/177983 [patent_app_country] => US [patent_app_date] => 2011-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3230 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13177983 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/177983
Nonvolatile memory and operation method of the same Jul 6, 2011 Issued
Array ( [id] => 7719063 [patent_doc_number] => 20120008398 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'NONVOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/178175 [patent_app_country] => US [patent_app_date] => 2011-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7458 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20120008398.pdf [firstpage_image] =>[orig_patent_app_number] => 13178175 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/178175
Nonvolatile memory device Jul 6, 2011 Issued
Array ( [id] => 9274680 [patent_doc_number] => 08638622 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-28 [patent_title] => 'Apparatus and method for receiving a differential data strobe signal' [patent_app_type] => utility [patent_app_number] => 13/067911 [patent_app_country] => US [patent_app_date] => 2011-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7195 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13067911 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/067911
Apparatus and method for receiving a differential data strobe signal Jul 5, 2011 Issued
Array ( [id] => 9356839 [patent_doc_number] => 08675385 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Semiconductor device having memory unit, method of writing to or reading from memory unit, and semiconductor device manufacturing method' [patent_app_type] => utility [patent_app_number] => 13/067773 [patent_app_country] => US [patent_app_date] => 2011-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 9751 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13067773 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/067773
Semiconductor device having memory unit, method of writing to or reading from memory unit, and semiconductor device manufacturing method Jun 23, 2011 Issued
Array ( [id] => 8521286 [patent_doc_number] => 20120320694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'Write assist in a dual write line semiconductor memory' [patent_app_type] => utility [patent_app_number] => 13/067629 [patent_app_country] => US [patent_app_date] => 2011-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7652 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13067629 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/067629
Write assist in a dual write line semiconductor memory Jun 14, 2011 Issued
Array ( [id] => 9505307 [patent_doc_number] => 08743630 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-03 [patent_title] => 'Current sense amplifier with replica bias scheme' [patent_app_type] => utility [patent_app_number] => 13/113427 [patent_app_country] => US [patent_app_date] => 2011-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4068 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13113427 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/113427
Current sense amplifier with replica bias scheme May 22, 2011 Issued
Array ( [id] => 9240724 [patent_doc_number] => 08605521 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Sense amplifiers, memories, and apparatuses and methods for sensing a data state of a memory cell' [patent_app_type] => utility [patent_app_number] => 13/106359 [patent_app_country] => US [patent_app_date] => 2011-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4321 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13106359 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/106359
Sense amplifiers, memories, and apparatuses and methods for sensing a data state of a memory cell May 11, 2011 Issued
Array ( [id] => 8934100 [patent_doc_number] => 08493810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-23 [patent_title] => 'Memory circuitry with write boost and write assist' [patent_app_type] => utility [patent_app_number] => 13/067109 [patent_app_country] => US [patent_app_date] => 2011-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4007 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13067109 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/067109
Memory circuitry with write boost and write assist May 8, 2011 Issued
Array ( [id] => 8691568 [patent_doc_number] => 08391099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-05 [patent_title] => 'Integrated circuit memory device, system and method having interleaved row and column control' [patent_app_type] => utility [patent_app_number] => 13/103548 [patent_app_country] => US [patent_app_date] => 2011-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5835 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13103548 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/103548
Integrated circuit memory device, system and method having interleaved row and column control May 8, 2011 Issued
Array ( [id] => 8482052 [patent_doc_number] => 20120281459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'ULTRA LOW POWER MEMORY CELL WITH A SUPPLY FEEDBACK LOOP CONFIGURED FOR MINIMAL LEAKAGE OPERATION' [patent_app_type] => utility [patent_app_number] => 13/103093 [patent_app_country] => US [patent_app_date] => 2011-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2840 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13103093 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/103093
ULTRA LOW POWER MEMORY CELL WITH A SUPPLY FEEDBACK LOOP CONFIGURED FOR MINIMAL LEAKAGE OPERATION May 7, 2011 Abandoned
Array ( [id] => 8556660 [patent_doc_number] => 08331138 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-12-11 [patent_title] => 'Non-volatile electromechanical configuration bit array' [patent_app_type] => utility [patent_app_number] => 13/103038 [patent_app_country] => US [patent_app_date] => 2011-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 8093 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13103038 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/103038
Non-volatile electromechanical configuration bit array May 5, 2011 Issued
Array ( [id] => 9101121 [patent_doc_number] => 08565010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Magnetic random access memory with field compensating layer and multi-level cell' [patent_app_type] => utility [patent_app_number] => 13/099321 [patent_app_country] => US [patent_app_date] => 2011-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 6354 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13099321 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/099321
Magnetic random access memory with field compensating layer and multi-level cell May 1, 2011 Issued
Array ( [id] => 8475831 [patent_doc_number] => 20120275238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-01 [patent_title] => 'MEMORY CIRCUIT AND CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/095153 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2644 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13095153 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095153
Memory circuit and control method thereof Apr 26, 2011 Issued
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