
Douglas King
Examiner (ID: 15404, Phone: (571)272-2311 , Office: P/2824 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2824 |
| Total Applications | 1004 |
| Issued Applications | 774 |
| Pending Applications | 71 |
| Abandoned Applications | 171 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6108540
[patent_doc_number] => 20110188302
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-04
[patent_title] => 'METHOD OF DRIVING PHASE CHANGE MEMORY DEVICE CAPABLE OF REDUCING HEAT DISTURBANCE'
[patent_app_type] => utility
[patent_app_number] => 12/782849
[patent_app_country] => US
[patent_app_date] => 2010-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => publications/A1/0188/20110188302.pdf
[firstpage_image] =>[orig_patent_app_number] => 12782849
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/782849 | METHOD OF DRIVING PHASE CHANGE MEMORY DEVICE CAPABLE OF REDUCING HEAT DISTURBANCE | May 18, 2010 | Abandoned |
Array
(
[id] => 9168180
[patent_doc_number] => 08593864
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-26
[patent_title] => 'Nonvolatile memory device and method of programming the same'
[patent_app_type] => utility
[patent_app_number] => 12/765349
[patent_app_country] => US
[patent_app_date] => 2010-04-22
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12765349
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/765349 | Nonvolatile memory device and method of programming the same | Apr 21, 2010 | Issued |
Array
(
[id] => 8761761
[patent_doc_number] => 08422291
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-04-16
[patent_title] => 'Storage device and method for reading the same'
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[patent_app_number] => 12/662329
[patent_app_country] => US
[patent_app_date] => 2010-04-12
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[patent_drawing_sheets_cnt] => 22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/662329 | Storage device and method for reading the same | Apr 11, 2010 | Issued |
Array
(
[id] => 7482758
[patent_doc_number] => 20110249515
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-10-13
[patent_title] => 'DIMM Memory Module Reference Voltage Switching Circuit'
[patent_app_type] => utility
[patent_app_number] => 12/756439
[patent_app_country] => US
[patent_app_date] => 2010-04-08
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/756439 | DIMM memory module reference voltage switching circuit | Apr 7, 2010 | Issued |
Array
(
[id] => 6494857
[patent_doc_number] => 20100259984
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-14
[patent_title] => 'ERASE METHOD OF NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/752573
[patent_app_country] => US
[patent_app_date] => 2010-04-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/752573 | ERASE METHOD OF NONVOLATILE SEMICONDUCTOR MEMORY DEVICE | Mar 31, 2010 | Abandoned |
Array
(
[id] => 6147862
[patent_doc_number] => 20110019486
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-01-27
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE AND PROGRAMMING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/748613
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[firstpage_image] =>[orig_patent_app_number] => 12748613
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/748613 | Semiconductor memory device and programming method thereof | Mar 28, 2010 | Issued |
Array
(
[id] => 6227621
[patent_doc_number] => 20100182821
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-22
[patent_title] => 'MEMORY DEVICE, MEMORY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT HAVING VARIABLE RESISTANCE'
[patent_app_type] => utility
[patent_app_number] => 12/749296
[patent_app_country] => US
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[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0182/20100182821.pdf
[firstpage_image] =>[orig_patent_app_number] => 12749296
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/749296 | MEMORY DEVICE, MEMORY CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT HAVING VARIABLE RESISTANCE | Mar 28, 2010 | Abandoned |
Array
(
[id] => 7697970
[patent_doc_number] => 20110228620
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-09-22
[patent_title] => 'TESTING METHOD FOR SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/728847
[patent_app_country] => US
[patent_app_date] => 2010-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[pdf_file] => publications/A1/0228/20110228620.pdf
[firstpage_image] =>[orig_patent_app_number] => 12728847
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/728847 | TESTING METHOD FOR SEMICONDUCTOR MEMORY DEVICE | Mar 21, 2010 | Abandoned |
Array
(
[id] => 8459442
[patent_doc_number] => 08295118
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-23
[patent_title] => 'Self-timed interface for strobe-based systems'
[patent_app_type] => utility
[patent_app_number] => 12/721520
[patent_app_country] => US
[patent_app_date] => 2010-03-10
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/721520 | Self-timed interface for strobe-based systems | Mar 9, 2010 | Issued |
Array
(
[id] => 6421111
[patent_doc_number] => 20100142252
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-10
[patent_title] => 'RECONFIGURABLE INPUT/OUTPUT IN HIERARCHICAL MEMORY LINK'
[patent_app_type] => utility
[patent_app_number] => 12/708049
[patent_app_country] => US
[patent_app_date] => 2010-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[pdf_file] => publications/A1/0142/20100142252.pdf
[firstpage_image] =>[orig_patent_app_number] => 12708049
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/708049 | Reconfigurable input/output in hierarchical memory link | Feb 17, 2010 | Issued |
Array
(
[id] => 6484026
[patent_doc_number] => 20100208531
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-08-19
[patent_title] => 'DATA READING CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 12/705791
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[firstpage_image] =>[orig_patent_app_number] => 12705791
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/705791 | DATA READING CIRCUIT | Feb 14, 2010 | Abandoned |
Array
(
[id] => 6412018
[patent_doc_number] => 20100149885
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[patent_title] => 'Memory circuit and method of writing data to and reading data from memory circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/656697 | Memory circuit and method of writing data to and reading data from memory circuit | Feb 11, 2010 | Issued |
Array
(
[id] => 7980075
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[patent_title] => 'High speed FRAM including a deselect circuit'
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Array
(
[id] => 7551905
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[patent_title] => 'Very high speed FRAM for replacing SRAM'
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Array
(
[id] => 6316583
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Array
(
[id] => 6316494
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/690995 | NON-VOLATILE MEMORY DEVICE AND ISPP PROGRAMMING METHOD | Jan 20, 2010 | Abandoned |
Array
(
[id] => 6186324
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/686721 | Access line dependent biasing schemes | Jan 12, 2010 | Issued |
Array
(
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Array
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Array
(
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[patent_title] => 'WORD-LINE LEVEL SHIFT CIRCUIT'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/579089 | Word-line level shift circuit | Oct 13, 2009 | Issued |