Search

Douglas King

Examiner (ID: 15404, Phone: (571)272-2311 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
1004
Issued Applications
774
Pending Applications
71
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6044781 [patent_doc_number] => 20110205787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'DUAL-RAIL SRAM WITH INDEPENDENT READ AND WRITE PORTS' [patent_app_type] => utility [patent_app_number] => 13/124733 [patent_app_country] => US [patent_app_date] => 2009-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5060 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20110205787.pdf [firstpage_image] =>[orig_patent_app_number] => 13124733 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/124733
DUAL-RAIL SRAM WITH INDEPENDENT READ AND WRITE PORTS Oct 11, 2009 Abandoned
Array ( [id] => 8556666 [patent_doc_number] => 08331144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-12-11 [patent_title] => 'Non-volatile memory device and program method thereof' [patent_app_type] => utility [patent_app_number] => 12/575735 [patent_app_country] => US [patent_app_date] => 2009-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 38 [patent_no_of_words] => 11093 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12575735 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/575735
Non-volatile memory device and program method thereof Oct 7, 2009 Issued
Array ( [id] => 6368296 [patent_doc_number] => 20100080074 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-01 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/567975 [patent_app_country] => US [patent_app_date] => 2009-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7131 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20100080074.pdf [firstpage_image] =>[orig_patent_app_number] => 12567975 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/567975
SEMICONDUCTOR MEMORY DEVICE Sep 27, 2009 Abandoned
Array ( [id] => 8352541 [patent_doc_number] => 08247871 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => '1T/0C RAM cell with a wrapped-around gate device structure' [patent_app_type] => utility [patent_app_number] => 12/566482 [patent_app_country] => US [patent_app_date] => 2009-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 6513 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12566482 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/566482
1T/0C RAM cell with a wrapped-around gate device structure Sep 23, 2009 Issued
Array ( [id] => 6344218 [patent_doc_number] => 20100085114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'HIGH-VOLTAGE GENERATION CIRCUIT AND SEMICONDUCTOR STORAGE DEVICE PROVIDED THEREWITH AND SEMICONDUCTOR INTEGRATED DEVICE' [patent_app_type] => utility [patent_app_number] => 12/564359 [patent_app_country] => US [patent_app_date] => 2009-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 26686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20100085114.pdf [firstpage_image] =>[orig_patent_app_number] => 12564359 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/564359
HIGH-VOLTAGE GENERATION CIRCUIT AND SEMICONDUCTOR STORAGE DEVICE PROVIDED THEREWITH AND SEMICONDUCTOR INTEGRATED DEVICE Sep 21, 2009 Abandoned
Array ( [id] => 6201133 [patent_doc_number] => 20110063919 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'MEMORY KINK CHECKING' [patent_app_type] => utility [patent_app_number] => 12/559275 [patent_app_country] => US [patent_app_date] => 2009-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12541 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20110063919.pdf [firstpage_image] =>[orig_patent_app_number] => 12559275 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/559275
Memory kink checking Sep 13, 2009 Issued
Array ( [id] => 9256046 [patent_doc_number] => 08619474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-31 [patent_title] => 'Data line management in a memory device' [patent_app_type] => utility [patent_app_number] => 12/556941 [patent_app_country] => US [patent_app_date] => 2009-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 8241 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12556941 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/556941
Data line management in a memory device Sep 9, 2009 Issued
Array ( [id] => 6249685 [patent_doc_number] => 20100027336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-04 [patent_title] => 'Non-volatile memory device and associated programming method using error checking and correction (ECC)' [patent_app_type] => utility [patent_app_number] => 12/458437 [patent_app_country] => US [patent_app_date] => 2009-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4892 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20100027336.pdf [firstpage_image] =>[orig_patent_app_number] => 12458437 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/458437
Non-volatile memory device and associated programming method using error checking and correction (ECC) Jul 12, 2009 Issued
Array ( [id] => 8341566 [patent_doc_number] => 08243496 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-14 [patent_title] => 'Resistive memory device and writing method thereof' [patent_app_type] => utility [patent_app_number] => 12/458085 [patent_app_country] => US [patent_app_date] => 2009-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 5724 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12458085 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/458085
Resistive memory device and writing method thereof Jun 29, 2009 Issued
Array ( [id] => 6286357 [patent_doc_number] => 20100157716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'Sub word line driving circuit' [patent_app_type] => utility [patent_app_number] => 12/455749 [patent_app_country] => US [patent_app_date] => 2009-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4701 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20100157716.pdf [firstpage_image] =>[orig_patent_app_number] => 12455749 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/455749
Sub word line driving circuit Jun 4, 2009 Abandoned
Array ( [id] => 5301805 [patent_doc_number] => 20090296457 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'Phase change random access memory and methods of manufacturing and operating same' [patent_app_type] => utility [patent_app_number] => 12/455007 [patent_app_country] => US [patent_app_date] => 2009-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6255 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20090296457.pdf [firstpage_image] =>[orig_patent_app_number] => 12455007 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/455007
Phase change random access memory and methods of manufacturing and operating same May 26, 2009 Issued
Array ( [id] => 6589046 [patent_doc_number] => 20100097840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-22 [patent_title] => 'FRAM including a tunable gain amp as a local sense amp' [patent_app_type] => utility [patent_app_number] => 12/471472 [patent_app_country] => US [patent_app_date] => 2009-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 19394 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20100097840.pdf [firstpage_image] =>[orig_patent_app_number] => 12471472 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/471472
FRAM including a tunable gain amp as a local sense amp May 25, 2009 Issued
Array ( [id] => 8592439 [patent_doc_number] => 08350316 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Phase change memory cells having vertical channel access transistor and memory plane' [patent_app_type] => utility [patent_app_number] => 12/471287 [patent_app_country] => US [patent_app_date] => 2009-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 8894 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12471287 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/471287
Phase change memory cells having vertical channel access transistor and memory plane May 21, 2009 Issued
Array ( [id] => 6528453 [patent_doc_number] => 20100221120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-02 [patent_title] => 'HANGING FRAME ASSEMBLY FOR CEILING FAN' [patent_app_type] => utility [patent_app_number] => 12/466749 [patent_app_country] => US [patent_app_date] => 2009-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1674 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20100221120.pdf [firstpage_image] =>[orig_patent_app_number] => 12466749 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/466749
Hanging frame assembly for ceiling fan May 14, 2009 Issued
Array ( [id] => 5551023 [patent_doc_number] => 20090285009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-19 [patent_title] => 'Nonvolatile memory devices using variable resistive elements' [patent_app_type] => utility [patent_app_number] => 12/453529 [patent_app_country] => US [patent_app_date] => 2009-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6232 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20090285009.pdf [firstpage_image] =>[orig_patent_app_number] => 12453529 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/453529
Nonvolatile memory devices using variable resistive elements May 13, 2009 Issued
Array ( [id] => 8677018 [patent_doc_number] => 08385142 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-26 [patent_title] => 'Flexible data strobe signal bus structure for wirebond and flip-chip packaging' [patent_app_type] => utility [patent_app_number] => 12/464783 [patent_app_country] => US [patent_app_date] => 2009-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5247 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12464783 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/464783
Flexible data strobe signal bus structure for wirebond and flip-chip packaging May 11, 2009 Issued
Array ( [id] => 6464489 [patent_doc_number] => 20100284211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'Multilevel Nonvolatile Memory via Dual Polarity Programming' [patent_app_type] => utility [patent_app_number] => 12/435741 [patent_app_country] => US [patent_app_date] => 2009-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11049 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20100284211.pdf [firstpage_image] =>[orig_patent_app_number] => 12435741 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/435741
Multilevel Nonvolatile Memory via Dual Polarity Programming May 4, 2009 Abandoned
Array ( [id] => 6564846 [patent_doc_number] => 20100128545 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-27 [patent_title] => 'Sense amplifier and semiconductor memory device using it' [patent_app_type] => utility [patent_app_number] => 12/453199 [patent_app_country] => US [patent_app_date] => 2009-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5020 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20100128545.pdf [firstpage_image] =>[orig_patent_app_number] => 12453199 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/453199
Sense amplifier and semiconductor memory device using it Apr 30, 2009 Issued
Array ( [id] => 5484206 [patent_doc_number] => 20090273971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'CONTINUOUSLY DRIVING NON-VOLATILE MEMORY ELEMENT' [patent_app_type] => utility [patent_app_number] => 12/433589 [patent_app_country] => US [patent_app_date] => 2009-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7438 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20090273971.pdf [firstpage_image] =>[orig_patent_app_number] => 12433589 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/433589
CONTINUOUSLY DRIVING NON-VOLATILE MEMORY ELEMENT Apr 29, 2009 Abandoned
Array ( [id] => 5484197 [patent_doc_number] => 20090273962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-11-05 [patent_title] => 'FOUR-TERMINAL MULTIPLE-TIME PROGRAMMABLE MEMORY BITCELL AND ARRAY ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 12/433027 [patent_app_country] => US [patent_app_date] => 2009-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7139 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20090273962.pdf [firstpage_image] =>[orig_patent_app_number] => 12433027 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/433027
FOUR-TERMINAL MULTIPLE-TIME PROGRAMMABLE MEMORY BITCELL AND ARRAY ARCHITECTURE Apr 29, 2009 Abandoned
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