Search

Douglas King

Examiner (ID: 15404, Phone: (571)272-2311 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
1004
Issued Applications
774
Pending Applications
71
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4838547 [patent_doc_number] => 20080279032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'Integrated Circuit Memory Device, System And Method Having Interleaved Row And Column Control' [patent_app_type] => utility [patent_app_number] => 12/177357 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0279/20080279032.pdf [firstpage_image] =>[orig_patent_app_number] => 12177357 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/177357
Integrated circuit memory device, system and method having interleaved row and column control Jul 21, 2008 Issued
Array ( [id] => 4522078 [patent_doc_number] => 07911820 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Regulating electrical fuse programming current' [patent_app_type] => utility [patent_app_number] => 12/176543 [patent_app_country] => US [patent_app_date] => 2008-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3666 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911820.pdf [firstpage_image] =>[orig_patent_app_number] => 12176543 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/176543
Regulating electrical fuse programming current Jul 20, 2008 Issued
Array ( [id] => 5414915 [patent_doc_number] => 20090040802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE, MEMORY-MOUNTED LSI AND FABRICATION METHOD FOR SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/176633 [patent_app_country] => US [patent_app_date] => 2008-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7622 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20090040802.pdf [firstpage_image] =>[orig_patent_app_number] => 12176633 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/176633
SEMICONDUCTOR MEMORY DEVICE, MEMORY-MOUNTED LSI AND FABRICATION METHOD FOR SEMICONDUCTOR MEMORY DEVICE Jul 20, 2008 Abandoned
Array ( [id] => 5519986 [patent_doc_number] => 20090027967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'NON-VOLATILE MEMORY DEVICE PROGRAMMING SELECTION TRANSISTOR AND METHOD OF PROGRAMMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/175609 [patent_app_country] => US [patent_app_date] => 2008-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7574 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20090027967.pdf [firstpage_image] =>[orig_patent_app_number] => 12175609 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/175609
NON-VOLATILE MEMORY DEVICE PROGRAMMING SELECTION TRANSISTOR AND METHOD OF PROGRAMMING THE SAME Jul 17, 2008 Abandoned
Array ( [id] => 5309609 [patent_doc_number] => 20090016890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-15 [patent_title] => 'TURBOMACHINE ROTOR ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 12/171775 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2381 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20090016890.pdf [firstpage_image] =>[orig_patent_app_number] => 12171775 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/171775
TURBOMACHINE ROTOR ASSEMBLY Jul 10, 2008 Abandoned
Array ( [id] => 5322755 [patent_doc_number] => 20090060745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'SHIM FOR A TURBOMACHINE BLADE' [patent_app_type] => utility [patent_app_number] => 12/171736 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2753 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20090060745.pdf [firstpage_image] =>[orig_patent_app_number] => 12171736 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/171736
SHIM FOR A TURBOMACHINE BLADE Jul 10, 2008 Abandoned
Array ( [id] => 8269328 [patent_doc_number] => 08210823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Method and apparatus for creating seal slots for turbine components' [patent_app_type] => utility [patent_app_number] => 12/168935 [patent_app_country] => US [patent_app_date] => 2008-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1684 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12168935 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/168935
Method and apparatus for creating seal slots for turbine components Jul 7, 2008 Issued
Array ( [id] => 6605632 [patent_doc_number] => 20100002484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-01-07 [patent_title] => 'Content addressable memory array with an invalidate feature' [patent_app_type] => utility [patent_app_number] => 12/217627 [patent_app_country] => US [patent_app_date] => 2008-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2917 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0002/20100002484.pdf [firstpage_image] =>[orig_patent_app_number] => 12217627 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/217627
Content addressable memory array with an invalidate feature Jul 6, 2008 Abandoned
Array ( [id] => 5463246 [patent_doc_number] => 20090323446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'MEMORY OPERATION TESTING' [patent_app_type] => utility [patent_app_number] => 12/164755 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7112 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0323/20090323446.pdf [firstpage_image] =>[orig_patent_app_number] => 12164755 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/164755
Memory operation testing Jun 29, 2008 Issued
Array ( [id] => 5433967 [patent_doc_number] => 20090168553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'Semiconductor memory device and method of operating the same' [patent_app_type] => utility [patent_app_number] => 12/217045 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5857 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0168/20090168553.pdf [firstpage_image] =>[orig_patent_app_number] => 12217045 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/217045
Semiconductor memory device and method of operating the same Jun 29, 2008 Issued
Array ( [id] => 4522317 [patent_doc_number] => 07911867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'Semiconductor memory device capable of performing per-bank refresh' [patent_app_type] => utility [patent_app_number] => 12/215457 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 2760 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911867.pdf [firstpage_image] =>[orig_patent_app_number] => 12215457 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215457
Semiconductor memory device capable of performing per-bank refresh Jun 26, 2008 Issued
Array ( [id] => 8626025 [patent_doc_number] => 08358524 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-01-22 [patent_title] => 'Methods and circuits for limiting bit line leakage current in a content addressable memory (CAM) device' [patent_app_type] => utility [patent_app_number] => 12/215875 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 36 [patent_no_of_words] => 12477 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12215875 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215875
Methods and circuits for limiting bit line leakage current in a content addressable memory (CAM) device Jun 26, 2008 Issued
Array ( [id] => 4615341 [patent_doc_number] => 07990788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Refresh characteristic testing circuit and method for testing refresh using the same' [patent_app_type] => utility [patent_app_number] => 12/215459 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5295 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 327 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/990/07990788.pdf [firstpage_image] =>[orig_patent_app_number] => 12215459 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215459
Refresh characteristic testing circuit and method for testing refresh using the same Jun 26, 2008 Issued
Array ( [id] => 8008319 [patent_doc_number] => 08085568 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-12-27 [patent_title] => 'Methods and circuits for placing unused content addressable memory (CAM) cells into low current states' [patent_app_type] => utility [patent_app_number] => 12/215747 [patent_app_country] => US [patent_app_date] => 2008-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 52 [patent_no_of_words] => 14888 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/085/08085568.pdf [firstpage_image] =>[orig_patent_app_number] => 12215747 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/215747
Methods and circuits for placing unused content addressable memory (CAM) cells into low current states Jun 26, 2008 Issued
Array ( [id] => 4474589 [patent_doc_number] => 07944739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Phase change memory device with bit line discharge path' [patent_app_type] => utility [patent_app_number] => 12/146539 [patent_app_country] => US [patent_app_date] => 2008-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 3837 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/944/07944739.pdf [firstpage_image] =>[orig_patent_app_number] => 12146539 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/146539
Phase change memory device with bit line discharge path Jun 25, 2008 Issued
Array ( [id] => 7516645 [patent_doc_number] => 08040725 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Flash memory device and method for adjusting read voltage of flash memory device' [patent_app_type] => utility [patent_app_number] => 12/146549 [patent_app_country] => US [patent_app_date] => 2008-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 9595 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/040/08040725.pdf [firstpage_image] =>[orig_patent_app_number] => 12146549 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/146549
Flash memory device and method for adjusting read voltage of flash memory device Jun 25, 2008 Issued
Array ( [id] => 5348657 [patent_doc_number] => 20090004018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'DEVICE FOR AXIALLY RETAINING BLADES MOUNTED ON A TURBOMACHINE ROTOR DISK' [patent_app_type] => utility [patent_app_number] => 12/145882 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2622 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20090004018.pdf [firstpage_image] =>[orig_patent_app_number] => 12145882 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/145882
Device for axially retaining blades mounted on a turbomachine rotor disk Jun 24, 2008 Issued
Array ( [id] => 7516670 [patent_doc_number] => 08040750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Dual mode memory system for reducing power requirements during memory backup transition' [patent_app_type] => utility [patent_app_number] => 12/145969 [patent_app_country] => US [patent_app_date] => 2008-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4861 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/040/08040750.pdf [firstpage_image] =>[orig_patent_app_number] => 12145969 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/145969
Dual mode memory system for reducing power requirements during memory backup transition Jun 24, 2008 Issued
Array ( [id] => 5301821 [patent_doc_number] => 20090296473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-03 [patent_title] => 'Method of Forming an Integrated Circuit with NAND Flash Array Segments and Intra Array Multiplexers and Corresponding Integrated Circuit with NAND Flash Array Segments and Intra Array Multiplexers' [patent_app_type] => utility [patent_app_number] => 12/129765 [patent_app_country] => US [patent_app_date] => 2008-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3943 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0296/20090296473.pdf [firstpage_image] =>[orig_patent_app_number] => 12129765 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/129765
Method of forming an integrated circuit with NAND flash array segments and intra array multiplexers and corresponding integrated circuit with NAND flash array segments and intra array multiplexers May 29, 2008 Issued
Array ( [id] => 5413575 [patent_doc_number] => 20090039462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'EFUSE DEVICES AND EFUSE ARRAYS THEREOF AND EFUSE BLOWING METHODS' [patent_app_type] => utility [patent_app_number] => 12/128650 [patent_app_country] => US [patent_app_date] => 2008-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2704 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20090039462.pdf [firstpage_image] =>[orig_patent_app_number] => 12128650 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/128650
EFUSE DEVICES AND EFUSE ARRAYS THEREOF AND EFUSE BLOWING METHODS May 28, 2008 Abandoned
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