Search

Douglas King

Examiner (ID: 15404, Phone: (571)272-2311 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
1004
Issued Applications
774
Pending Applications
71
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6966 [patent_doc_number] => 07813158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Recordable electrical memory' [patent_app_type] => utility [patent_app_number] => 11/855532 [patent_app_country] => US [patent_app_date] => 2007-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 40 [patent_no_of_words] => 16409 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/813/07813158.pdf [firstpage_image] =>[orig_patent_app_number] => 11855532 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/855532
Recordable electrical memory Sep 13, 2007 Issued
Array ( [id] => 4668464 [patent_doc_number] => 20080043524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/840525 [patent_app_country] => US [patent_app_date] => 2007-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5060 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0043/20080043524.pdf [firstpage_image] =>[orig_patent_app_number] => 11840525 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/840525
Semiconductor memory device Aug 16, 2007 Issued
Array ( [id] => 5519830 [patent_doc_number] => 20090027811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'Spin transfer MRAM device with reduced coefficient of MTJ resistance variation' [patent_app_type] => utility [patent_app_number] => 11/881627 [patent_app_country] => US [patent_app_date] => 2007-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4581 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20090027811.pdf [firstpage_image] =>[orig_patent_app_number] => 11881627 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/881627
Spin transfer MRAM device with reduced coefficient of MTJ resistance variation Jul 26, 2007 Abandoned
Array ( [id] => 5519995 [patent_doc_number] => 20090027976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'Threshold device for a memory array' [patent_app_type] => utility [patent_app_number] => 11/881473 [patent_app_country] => US [patent_app_date] => 2007-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 17386 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20090027976.pdf [firstpage_image] =>[orig_patent_app_number] => 11881473 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/881473
Threshold device for a memory array Jul 25, 2007 Issued
Array ( [id] => 4650070 [patent_doc_number] => 20080037326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-14 [patent_title] => 'XIP FLASH MEMORY DEVICE AND PROGRAM METHOD' [patent_app_type] => utility [patent_app_number] => 11/781379 [patent_app_country] => US [patent_app_date] => 2007-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4250 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20080037326.pdf [firstpage_image] =>[orig_patent_app_number] => 11781379 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/781379
XIP FLASH MEMORY DEVICE AND PROGRAM METHOD Jul 22, 2007 Abandoned
Array ( [id] => 4804688 [patent_doc_number] => 20080016277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-17 [patent_title] => 'DRAM HIERARCHICAL DATA PATH' [patent_app_type] => utility [patent_app_number] => 11/775717 [patent_app_country] => US [patent_app_date] => 2007-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5406 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0016/20080016277.pdf [firstpage_image] =>[orig_patent_app_number] => 11775717 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/775717
DRAM HIERARCHICAL DATA PATH Jul 9, 2007 Abandoned
Array ( [id] => 4445172 [patent_doc_number] => 07929355 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Memory device performing write leveling operation' [patent_app_type] => utility [patent_app_number] => 11/819815 [patent_app_country] => US [patent_app_date] => 2007-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2599 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/929/07929355.pdf [firstpage_image] =>[orig_patent_app_number] => 11819815 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/819815
Memory device performing write leveling operation Jun 28, 2007 Issued
Array ( [id] => 4849688 [patent_doc_number] => 20080315430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'NANOWIRE VIAS' [patent_app_type] => utility [patent_app_number] => 11/767066 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8998 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20080315430.pdf [firstpage_image] =>[orig_patent_app_number] => 11767066 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767066
NANOWIRE VIAS Jun 21, 2007 Abandoned
Array ( [id] => 7531493 [patent_doc_number] => 07843722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-30 [patent_title] => 'Nonvolatile semiconductor memory device and programming method thereof' [patent_app_type] => utility [patent_app_number] => 11/765057 [patent_app_country] => US [patent_app_date] => 2007-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6385 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/843/07843722.pdf [firstpage_image] =>[orig_patent_app_number] => 11765057 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/765057
Nonvolatile semiconductor memory device and programming method thereof Jun 18, 2007 Issued
Array ( [id] => 4712823 [patent_doc_number] => 20080301349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'Semiconductor Memory Arrangement' [patent_app_type] => utility [patent_app_number] => 11/756541 [patent_app_country] => US [patent_app_date] => 2007-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6410 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0301/20080301349.pdf [firstpage_image] =>[orig_patent_app_number] => 11756541 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/756541
Semiconductor memory arrangement May 30, 2007 Issued
Array ( [id] => 4975323 [patent_doc_number] => 20070216553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Memory device' [patent_app_type] => utility [patent_app_number] => 11/801501 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3181 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0216/20070216553.pdf [firstpage_image] =>[orig_patent_app_number] => 11801501 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/801501
Memory device with parallel interface May 9, 2007 Issued
Array ( [id] => 4521104 [patent_doc_number] => 07933142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Semiconductor memory cell and array using punch-through to program and read same' [patent_app_type] => utility [patent_app_number] => 11/796935 [patent_app_country] => US [patent_app_date] => 2007-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 21 [patent_no_of_words] => 9684 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/933/07933142.pdf [firstpage_image] =>[orig_patent_app_number] => 11796935 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/796935
Semiconductor memory cell and array using punch-through to program and read same Apr 29, 2007 Issued
Array ( [id] => 4831841 [patent_doc_number] => 20080130387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-05 [patent_title] => 'METHOD FOR EVALUATING MEMORY CELL PERFORMANCE' [patent_app_type] => utility [patent_app_number] => 11/741187 [patent_app_country] => US [patent_app_date] => 2007-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4408 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20080130387.pdf [firstpage_image] =>[orig_patent_app_number] => 11741187 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741187
Method for evaluating memory cell performance Apr 26, 2007 Issued
Array ( [id] => 4808939 [patent_doc_number] => 20080172517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-17 [patent_title] => 'Mask-Programmable Memory with Reserved Space' [patent_app_type] => utility [patent_app_number] => 11/736773 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2543 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0172/20080172517.pdf [firstpage_image] =>[orig_patent_app_number] => 11736773 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736773
Mask-Programmable Memory with Reserved Space Apr 17, 2007 Abandoned
Array ( [id] => 8593372 [patent_doc_number] => 08351249 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 12/297153 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 7682 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12297153 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/297153
Magnetic random access memory Apr 8, 2007 Issued
Array ( [id] => 5289863 [patent_doc_number] => 20090022593 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-22 [patent_title] => 'FAN BLADE RETAINING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/162865 [patent_app_country] => US [patent_app_date] => 2007-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4380 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0022/20090022593.pdf [firstpage_image] =>[orig_patent_app_number] => 12162865 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/162865
FAN BLADE RETAINING STRUCTURE Mar 12, 2007 Abandoned
Array ( [id] => 5336601 [patent_doc_number] => 20090053065 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'FAN BLADE RETAINING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/162854 [patent_app_country] => US [patent_app_date] => 2007-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4144 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20090053065.pdf [firstpage_image] =>[orig_patent_app_number] => 12162854 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/162854
FAN BLADE RETAINING STRUCTURE Mar 12, 2007 Abandoned
Array ( [id] => 5027293 [patent_doc_number] => 20070268739 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-22 [patent_title] => 'Nanowire memory device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/714826 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 4835 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20070268739.pdf [firstpage_image] =>[orig_patent_app_number] => 11714826 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/714826
Nanowire memory device and method of manufacturing the same Mar 6, 2007 Issued
Array ( [id] => 4770331 [patent_doc_number] => 20080055989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-06 [patent_title] => 'Memory system including flash memory and method of operating the same' [patent_app_type] => utility [patent_app_number] => 11/710991 [patent_app_country] => US [patent_app_date] => 2007-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5273 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20080055989.pdf [firstpage_image] =>[orig_patent_app_number] => 11710991 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/710991
Memory system including flash memory and method of operating the same Feb 26, 2007 Issued
Array ( [id] => 4976041 [patent_doc_number] => 20070217272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'MEMORY DEVICE AND RELATIVE CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 11/677411 [patent_app_country] => US [patent_app_date] => 2007-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1168 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20070217272.pdf [firstpage_image] =>[orig_patent_app_number] => 11677411 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/677411
MEMORY DEVICE AND RELATIVE CONTROL METHOD Feb 20, 2007 Abandoned
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