Search

Douglas King

Examiner (ID: 126, Phone: (571)272-2311 , Office: P/2824 )

Most Active Art Unit
2824
Art Unit(s)
2824
Total Applications
970
Issued Applications
746
Pending Applications
78
Abandoned Applications
170

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18652845 [patent_doc_number] => 20230298685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => MEMORY SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 17/896887 [patent_app_country] => US [patent_app_date] => 2022-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896887 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/896887
Memory system and method Aug 25, 2022 Issued
Array ( [id] => 19626893 [patent_doc_number] => 12165740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Memory traffic monitoring [patent_app_type] => utility [patent_app_number] => 17/821413 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 18402 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821413 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/821413
Memory traffic monitoring Aug 21, 2022 Issued
Array ( [id] => 18080736 [patent_doc_number] => 20220406348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => DATA READING/WRITING METHOD, MEMORY, STORAGE APPARATUS, AND TERMINAL [patent_app_type] => utility [patent_app_number] => 17/893067 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/893067
Data reading/writing method, memory, storage apparatus, and terminal Aug 21, 2022 Issued
Array ( [id] => 19198912 [patent_doc_number] => 11996160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => Low power signaling interface [patent_app_type] => utility [patent_app_number] => 17/892291 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 29 [patent_no_of_words] => 11244 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892291 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/892291
Low power signaling interface Aug 21, 2022 Issued
Array ( [id] => 19720127 [patent_doc_number] => 12205670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Memory system and operating method of memory system [patent_app_type] => utility [patent_app_number] => 17/821187 [patent_app_country] => US [patent_app_date] => 2022-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7919 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821187 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/821187
Memory system and operating method of memory system Aug 20, 2022 Issued
Array ( [id] => 18789029 [patent_doc_number] => 20230377638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => MEMORY DEVICE INCLUDING BOOSTER CIRCUIT FOR TRACKING WORD LINE [patent_app_type] => utility [patent_app_number] => 17/890693 [patent_app_country] => US [patent_app_date] => 2022-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14066 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890693 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/890693
Memory device including booster circuit for tracking word line Aug 17, 2022 Issued
Array ( [id] => 19507633 [patent_doc_number] => 12119062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Managing compensation for cell-to-cell coupling and lateral migration in memory devices based on a sensitivity metric [patent_app_type] => utility [patent_app_number] => 17/884113 [patent_app_country] => US [patent_app_date] => 2022-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 16190 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884113 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884113
Managing compensation for cell-to-cell coupling and lateral migration in memory devices based on a sensitivity metric Aug 8, 2022 Issued
Array ( [id] => 18857065 [patent_doc_number] => 11854656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Memory refresh [patent_app_type] => utility [patent_app_number] => 17/817898 [patent_app_country] => US [patent_app_date] => 2022-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8093 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17817898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/817898
Memory refresh Aug 4, 2022 Issued
Array ( [id] => 18958661 [patent_doc_number] => 20240046988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => DIFFERENTIABLE CONTENT ADDRESSABLE MEMORY [patent_app_type] => utility [patent_app_number] => 17/876471 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876471 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876471
Differentiable content addressable memory Jul 27, 2022 Issued
Array ( [id] => 18514397 [patent_doc_number] => 20230230652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => TESTING SYSTEM AND TESTING METHOD [patent_app_type] => utility [patent_app_number] => 17/814232 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3304 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814232 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814232
Testing system and testing method Jul 21, 2022 Issued
Array ( [id] => 19244337 [patent_doc_number] => 12014788 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Memory array detection circuit and detection method, and memory [patent_app_type] => utility [patent_app_number] => 17/813597 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7206 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813597 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/813597
Memory array detection circuit and detection method, and memory Jul 18, 2022 Issued
Array ( [id] => 18820790 [patent_doc_number] => 20230395131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => Sense Amplifier Reference Voltage Through Sense Amplifier Latch Devices [patent_app_type] => utility [patent_app_number] => 17/860470 [patent_app_country] => US [patent_app_date] => 2022-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6235 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860470 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/860470
Sense amplifier reference voltage through sense amplifier latch devices Jul 7, 2022 Issued
Array ( [id] => 19703707 [patent_doc_number] => 12197742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Managing error compensation using charge coupling and lateral migration sensitivity [patent_app_type] => utility [patent_app_number] => 17/860701 [patent_app_country] => US [patent_app_date] => 2022-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 15596 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860701 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/860701
Managing error compensation using charge coupling and lateral migration sensitivity Jul 7, 2022 Issued
Array ( [id] => 18144568 [patent_doc_number] => 20230018420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SRAM WITH FAST, CONTROLLED PEAK CURRENT, POWER EFFICIENT ARRAY RESET, AND DATA CORRUPTION MODES FOR SECURE APPLICATIONS [patent_app_type] => utility [patent_app_number] => 17/853026 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9265 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/853026
SRAM with fast, controlled peak current, power efficient array reset, and data corruption modes for secure applications Jun 28, 2022 Issued
Array ( [id] => 18222457 [patent_doc_number] => 20230061451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => ZIGZAG WIRED MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 17/852556 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852556
ZIGZAG WIRED MEMORY MODULE Jun 28, 2022 Pending
Array ( [id] => 18222457 [patent_doc_number] => 20230061451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => ZIGZAG WIRED MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 17/852556 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10958 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852556 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852556
ZIGZAG WIRED MEMORY MODULE Jun 28, 2022 Pending
Array ( [id] => 18865624 [patent_doc_number] => 20230420061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => NON-VOLATILE MEMORY WITH PRECISE PROGRAMMING [patent_app_type] => utility [patent_app_number] => 17/852129 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852129 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852129
Non-volatile memory with precise programming Jun 27, 2022 Issued
Array ( [id] => 18364090 [patent_doc_number] => 20230145681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => METHOD OF PROGRAMMING NON-VOLATILE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/852057 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14392 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852057 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/852057
Method of programming non-volatile memory device Jun 27, 2022 Issued
Array ( [id] => 20305205 [patent_doc_number] => 12451201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-21 [patent_title] => Hybrid precharge select scheme to save program ICC [patent_app_type] => utility [patent_app_number] => 17/845318 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 7189 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845318 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845318
Hybrid precharge select scheme to save program ICC Jun 20, 2022 Issued
Array ( [id] => 18848452 [patent_doc_number] => 20230410856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MEMORY CHIP, MEMORY DEVICE AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/845008 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4810 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845008 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/845008
Memory chip, memory device and operation method thereof Jun 20, 2022 Issued
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