Search

Douglas W. Owens

Examiner (ID: 10431)

Most Active Art Unit
2811
Art Unit(s)
2821, 2844, 2823, 2897, 2814, 2811
Total Applications
1072
Issued Applications
875
Pending Applications
94
Abandoned Applications
125

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18494218 [patent_doc_number] => 11699639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-11 [patent_title] => Conductive member cavities [patent_app_type] => utility [patent_app_number] => 17/219768 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 27 [patent_no_of_words] => 4710 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219768 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219768
Conductive member cavities Mar 30, 2021 Issued
Array ( [id] => 16966426 [patent_doc_number] => 20210217925 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => NITRIDE-BASED SEMICONDUCTOR LIGHT-EMITTING ELEMENT AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/219109 [patent_app_country] => US [patent_app_date] => 2021-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17219109 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/219109
Nitride-based semiconductor light-emitting element and manufacturing method thereof Mar 30, 2021 Issued
Array ( [id] => 17900839 [patent_doc_number] => 20220310501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/213184 [patent_app_country] => US [patent_app_date] => 2021-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17195 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17213184 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/213184
Semiconductor package Mar 24, 2021 Issued
Array ( [id] => 16936653 [patent_doc_number] => 20210202542 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => LIQUID CRYSTAL DISPLAY DEVICE, EL DISPLAY DEVICE, AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/204460 [patent_app_country] => US [patent_app_date] => 2021-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17204460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/204460
Liquid crystal display device, EL display device, and manufacturing method thereof Mar 16, 2021 Issued
Array ( [id] => 17417102 [patent_doc_number] => 20220052006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/203372 [patent_app_country] => US [patent_app_date] => 2021-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6615 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17203372 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/203372
Semiconductor package with under-bump metal structure Mar 15, 2021 Issued
Array ( [id] => 17833697 [patent_doc_number] => 20220271001 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SEMICONDUCTOR STRUCTURE WITH NANO-TWINNED METAL COATING LAYER AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/200931 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3739 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200931
Semiconductor structure with nano-twinned metal coating layer and fabrication method thereof Mar 14, 2021 Issued
Array ( [id] => 18857617 [patent_doc_number] => 11855214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Inner spacers for gate-all-around semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/201673 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 9662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201673 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/201673
Inner spacers for gate-all-around semiconductor devices Mar 14, 2021 Issued
Array ( [id] => 17764858 [patent_doc_number] => 20220238471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => METAL BUMP STRUCTURE AND MANUFACTURING METHOD THEREOF AND DRIVING SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/200922 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17200922 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/200922
Metal bump structure and manufacturing method thereof and driving substrate Mar 14, 2021 Issued
Array ( [id] => 16936750 [patent_doc_number] => 20210202639 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => THIN FILM TRANSISTOR AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/199991 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199991
Thin film transistor and display device Mar 11, 2021 Issued
Array ( [id] => 17870458 [patent_doc_number] => 20220293195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => POWER REALLOCATION FOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/199534 [patent_app_country] => US [patent_app_date] => 2021-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17199534 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/199534
Power reallocation for memory device Mar 11, 2021 Issued
Array ( [id] => 19294569 [patent_doc_number] => 12033933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Semiconductor structures and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/432191 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 4126 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17432191 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/432191
Semiconductor structures and methods for forming the same Mar 9, 2021 Issued
Array ( [id] => 17870730 [patent_doc_number] => 20220293467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => METHOD FOR MICROSTRUCTURE MODIFICATION OF CONDUCTING LINES [patent_app_type] => utility [patent_app_number] => 17/197965 [patent_app_country] => US [patent_app_date] => 2021-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17197965 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/197965
Method for microstructure modification of conducting lines Mar 9, 2021 Issued
Array ( [id] => 16920512 [patent_doc_number] => 20210193604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-24 [patent_title] => SEMICONDUCTOR CHIP WITH REDUCED PITCH CONDUCTIVE PILLARS [patent_app_type] => utility [patent_app_number] => 17/195046 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195046 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195046
Semiconductor chip with reduced pitch conductive pillars Mar 7, 2021 Issued
Array ( [id] => 18073685 [patent_doc_number] => 11532524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => Integrated circuit test method and structure thereof [patent_app_type] => utility [patent_app_number] => 17/195537 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 7879 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17195537 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/195537
Integrated circuit test method and structure thereof Mar 7, 2021 Issued
Array ( [id] => 17855287 [patent_doc_number] => 20220285330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE HAVING GALVANIC ISOLATION AND METHOD THEREFOR [patent_app_type] => utility [patent_app_number] => 17/190542 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7571 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17190542 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/190542
Semiconductor device package having galvanic isolation and method therefor Mar 2, 2021 Issued
Array ( [id] => 17941770 [patent_doc_number] => 11476230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/189228 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 8160 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17189228 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/189228
Semiconductor device and method of manufacturing semiconductor device Feb 28, 2021 Issued
Array ( [id] => 18507581 [patent_doc_number] => 11705408 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/185944 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 9817 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185944
Semiconductor package Feb 24, 2021 Issued
Array ( [id] => 17833691 [patent_doc_number] => 20220270995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SIDEWALL WETTING BARRIER FOR CONDUCTIVE PILLARS [patent_app_type] => utility [patent_app_number] => 17/185244 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185244 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/185244
Sidewall wetting barrier for conductive pillars Feb 24, 2021 Issued
Array ( [id] => 19086259 [patent_doc_number] => 20240113060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => HETEROGENEOUS SOLDER BUMP STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/276787 [patent_app_country] => US [patent_app_date] => 2021-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18276787 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/276787
HETEROGENEOUS SOLDER BUMP STRUCTURE Feb 21, 2021 Pending
Array ( [id] => 18282613 [patent_doc_number] => 20230098085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => ORGANIC EL DISPLAY DEVICE, PRODUCTION METHOD FOR CURED PRODUCT, AND PRODUCTION METHOD FOR ORGANIC EL DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/794658 [patent_app_country] => US [patent_app_date] => 2021-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16353 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17794658 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/794658
Organic EL display device, production method for cured product, and production method for organic EL display device Feb 7, 2021 Issued
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