Search

Douglas W. Owens

Supervisory Patent Examiner (ID: 11904, Phone: (571)272-1662 , Office: P/2844 )

Most Active Art Unit
2811
Art Unit(s)
2844, 2823, 2897, 2811, 2821, 2814
Total Applications
1068
Issued Applications
865
Pending Applications
103
Abandoned Applications
125

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19330449 [patent_doc_number] => 12048149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Three-dimensional memory device having source-select-gate cut structures and methods for forming the same [patent_app_type] => utility [patent_app_number] => 17/162904 [patent_app_country] => US [patent_app_date] => 2021-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 18847 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17162904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/162904
Three-dimensional memory device having source-select-gate cut structures and methods for forming the same Jan 28, 2021 Issued
Array ( [id] => 17764855 [patent_doc_number] => 20220238468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/159080 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159080 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/159080
Semiconductor device and method for fabricating the same Jan 25, 2021 Issued
Array ( [id] => 16889085 [patent_doc_number] => 20210175282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => DISPLAY APPARATUS WITH DETECTION DEVICE [patent_app_type] => utility [patent_app_number] => 17/158283 [patent_app_country] => US [patent_app_date] => 2021-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12038 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17158283 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/158283
Display apparatus with detection device Jan 25, 2021 Issued
Array ( [id] => 17347155 [patent_doc_number] => 20220013486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-13 [patent_title] => SEMICONDUCTOR COMPOSITE STRUCTURE, METHOD FOR MAKING THE SAME, AND SEMICONDUCTOR DEVICE HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 17/149835 [patent_app_country] => US [patent_app_date] => 2021-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2823 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17149835 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/149835
SEMICONDUCTOR COMPOSITE STRUCTURE, METHOD FOR MAKING THE SAME, AND SEMICONDUCTOR DEVICE HAVING THE SAME Jan 14, 2021 Abandoned
Array ( [id] => 17070700 [patent_doc_number] => 20210272917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-02 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/148923 [patent_app_country] => US [patent_app_date] => 2021-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9477 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 346 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17148923 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/148923
Method of manufacturing semiconductor device Jan 13, 2021 Issued
Array ( [id] => 17738087 [patent_doc_number] => 20220223549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => CONDUCTIVE STRUCTURE AND ELECTRONIC DEVICE COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 17/146675 [patent_app_country] => US [patent_app_date] => 2021-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9005 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17146675 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/146675
Conductive structure and electronic device comprising the same Jan 11, 2021 Issued
Array ( [id] => 19919838 [patent_doc_number] => 12295234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Display substrate and manufacturing method therefor, and display panel and display device [patent_app_type] => utility [patent_app_number] => 17/776817 [patent_app_country] => US [patent_app_date] => 2021-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 37 [patent_no_of_words] => 4732 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17776817 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/776817
Display substrate and manufacturing method therefor, and display panel and display device Jan 4, 2021 Issued
Array ( [id] => 18947426 [patent_doc_number] => 11890702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Solder joint [patent_app_type] => utility [patent_app_number] => 17/134881 [patent_app_country] => US [patent_app_date] => 2020-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 13416 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17134881 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/134881
Solder joint Dec 27, 2020 Issued
Array ( [id] => 19918607 [patent_doc_number] => 12293983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Conductive pillar, method for manufacturing the same, and method for manufacturing bonded structure [patent_app_type] => utility [patent_app_number] => 17/791652 [patent_app_country] => US [patent_app_date] => 2020-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 24 [patent_no_of_words] => 19428 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17791652 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/791652
Conductive pillar, method for manufacturing the same, and method for manufacturing bonded structure Dec 16, 2020 Issued
Array ( [id] => 17893285 [patent_doc_number] => 11456267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Fet construction with copper pillars or bump directly over the fet [patent_app_type] => utility [patent_app_number] => 17/124485 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4424 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17124485 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/124485
Fet construction with copper pillars or bump directly over the fet Dec 15, 2020 Issued
Array ( [id] => 17941753 [patent_doc_number] => 11476212 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Semiconductor contact structure having stress buffer layer formed between under bump metal layer and copper pillar [patent_app_type] => utility [patent_app_number] => 17/123132 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 34 [patent_no_of_words] => 6790 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17123132 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/123132
Semiconductor contact structure having stress buffer layer formed between under bump metal layer and copper pillar Dec 15, 2020 Issued
Array ( [id] => 17660821 [patent_doc_number] => 20220181286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-09 [patent_title] => TRANSFERRABLE PILLAR STRUCTURE FOR FANOUT PACKAGE OR INTERCONNECT BRIDGE [patent_app_type] => utility [patent_app_number] => 17/115882 [patent_app_country] => US [patent_app_date] => 2020-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9771 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17115882 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/115882
Transferrable pillar structure for fanout package or interconnect bridge Dec 8, 2020 Issued
Array ( [id] => 18767030 [patent_doc_number] => 11817442 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Hybrid manufacturing for integrated circuit devices and assemblies [patent_app_type] => utility [patent_app_number] => 17/114700 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 61 [patent_no_of_words] => 46878 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17114700 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/114700
Hybrid manufacturing for integrated circuit devices and assemblies Dec 7, 2020 Issued
Array ( [id] => 18156198 [patent_doc_number] => 11569190 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-31 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/115548 [patent_app_country] => US [patent_app_date] => 2020-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 4400 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17115548 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/115548
Semiconductor structure and manufacturing method thereof Dec 7, 2020 Issued
Array ( [id] => 17825798 [patent_doc_number] => 11430752 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-08-30 [patent_title] => Low cost millimiter wave integrated LTCC package [patent_app_type] => utility [patent_app_number] => 17/112604 [patent_app_country] => US [patent_app_date] => 2020-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 7699 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17112604 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/112604
Low cost millimiter wave integrated LTCC package Dec 3, 2020 Issued
Array ( [id] => 17908803 [patent_doc_number] => 11462668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Stacked semiconductor device, and set of onboard-components, body and jointing-elements to be used in the stacked semiconductor device [patent_app_type] => utility [patent_app_number] => 17/107844 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 28 [patent_no_of_words] => 32459 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17107844 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/107844
Stacked semiconductor device, and set of onboard-components, body and jointing-elements to be used in the stacked semiconductor device Nov 29, 2020 Issued
Array ( [id] => 17645332 [patent_doc_number] => 20220173071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => INTERFACIAL TILT-RESISTANT BONDED ASSEMBLY AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/106884 [patent_app_country] => US [patent_app_date] => 2020-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17106884 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/106884
Interfacial tilt-resistant bonded assembly and methods for forming the same Nov 29, 2020 Issued
Array ( [id] => 16936530 [patent_doc_number] => 20210202419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => WLCSP PACKAGE WITH DIFFERENT SOLDER VOLUMES [patent_app_type] => utility [patent_app_number] => 17/104968 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11438 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17104968 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/104968
WLCSP package with different solder volumes Nov 24, 2020 Issued
Array ( [id] => 17716638 [patent_doc_number] => 11380637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-05 [patent_title] => Efficient redistribution layer topology [patent_app_type] => utility [patent_app_number] => 16/950708 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 5121 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950708 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950708
Efficient redistribution layer topology Nov 16, 2020 Issued
Array ( [id] => 16858454 [patent_doc_number] => 20210159199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/950789 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4113 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950789 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950789
Semiconductor device Nov 16, 2020 Issued
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