
Douglas W. Owens
Examiner (ID: 10431)
| Most Active Art Unit | 2811 |
| Art Unit(s) | 2821, 2844, 2823, 2897, 2814, 2811 |
| Total Applications | 1072 |
| Issued Applications | 875 |
| Pending Applications | 94 |
| Abandoned Applications | 125 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19980251
[patent_doc_number] => 12347739
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-01
[patent_title] => Package structure
[patent_app_type] => utility
[patent_app_number] => 17/896097
[patent_app_country] => US
[patent_app_date] => 2022-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 1025
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17896097
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/896097 | Package structure | Aug 25, 2022 | Issued |
Array
(
[id] => 19007776
[patent_doc_number] => 20240071847
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD
[patent_app_type] => utility
[patent_app_number] => 17/822470
[patent_app_country] => US
[patent_app_date] => 2022-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8827
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17822470
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/822470 | Semiconductor package and method | Aug 25, 2022 | Issued |
Array
(
[id] => 18408968
[patent_doc_number] => 20230170321
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => SEMICONDUCTOR DEVICE, SUBSTRATE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/895397
[patent_app_country] => US
[patent_app_date] => 2022-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7877
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17895397
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/895397 | Semiconductor device, substrate, and method for manufacturing semiconductor device | Aug 24, 2022 | Issued |
Array
(
[id] => 19016384
[patent_doc_number] => 11923326
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-05
[patent_title] => Bump structure and method of manufacturing bump structure
[patent_app_type] => utility
[patent_app_number] => 17/875291
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 31
[patent_no_of_words] => 12404
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875291
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/875291 | Bump structure and method of manufacturing bump structure | Jul 26, 2022 | Issued |
Array
(
[id] => 18008529
[patent_doc_number] => 20220367296
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => INTEGRATED CIRCUIT TEST METHOD AND STRUCTURE THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/873804
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7880
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873804
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/873804 | Integrated circuit test method and structure thereof | Jul 25, 2022 | Issued |
Array
(
[id] => 19294605
[patent_doc_number] => 12033969
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-09
[patent_title] => Chip package structure
[patent_app_type] => utility
[patent_app_number] => 17/873673
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 6565
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873673
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/873673 | Chip package structure | Jul 25, 2022 | Issued |
Array
(
[id] => 18008644
[patent_doc_number] => 20220367411
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => CHIP PACKAGE STRUCTURE WITH INTEGRATED DEVICE INTEGRATED BENEATH THE SEMICONDUCTOR CHIP
[patent_app_type] => utility
[patent_app_number] => 17/813648
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6932
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813648
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/813648 | Chip package structure with integrated device integrated beneath the semiconductor chip | Jul 19, 2022 | Issued |
Array
(
[id] => 19610966
[patent_doc_number] => 12159847
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-03
[patent_title] => Integrated fan-out structures and methods for forming the same
[patent_app_type] => utility
[patent_app_number] => 17/868226
[patent_app_country] => US
[patent_app_date] => 2022-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 5573
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868226
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/868226 | Integrated fan-out structures and methods for forming the same | Jul 18, 2022 | Issued |
Array
(
[id] => 18906143
[patent_doc_number] => 20240021628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-18
[patent_title] => DISPLAY PANEL AND MANUFACTURING METHOD THEREOF, AND ELECTRONIC TERMINAL
[patent_app_type] => utility
[patent_app_number] => 17/796657
[patent_app_country] => US
[patent_app_date] => 2022-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8800
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 241
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17796657
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/796657 | Display panel and manufacturing method thereof, and electronic terminal | Jul 12, 2022 | Issued |
Array
(
[id] => 19081117
[patent_doc_number] => 11950513
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => Semiconductor device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/857185
[patent_app_country] => US
[patent_app_date] => 2022-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3151
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857185
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/857185 | Semiconductor device and method for fabricating the same | Jul 4, 2022 | Issued |
Array
(
[id] => 20720291
[patent_doc_number] => 12635564
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-05-19
[patent_title] => Liquid metal based first level interconnects
[patent_app_type] => utility
[patent_app_number] => 17/856965
[patent_app_country] => US
[patent_app_date] => 2022-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 5537
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856965
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/856965 | LIQUID METAL BASED FIRST LEVEL INTERCONNECTS | Jul 1, 2022 | Issued |
Array
(
[id] => 17933441
[patent_doc_number] => 20220328567
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => LIGHT-EMITTING DIODE DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/853325
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17273
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853325
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/853325 | Light-emitting diode display panel, manufacturing method thereof, and display device | Jun 28, 2022 | Issued |
Array
(
[id] => 19567807
[patent_doc_number] => 12142586
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-11-12
[patent_title] => Efficient redistribution layer topology
[patent_app_type] => utility
[patent_app_number] => 17/809854
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 5143
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809854
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/809854 | Efficient redistribution layer topology | Jun 28, 2022 | Issued |
Array
(
[id] => 17933300
[patent_doc_number] => 20220328426
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => DEVICES AND METHODS FOR REDUCING STRESS ON CIRCUIT COMPONENTS
[patent_app_type] => utility
[patent_app_number] => 17/850932
[patent_app_country] => US
[patent_app_date] => 2022-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6136
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850932
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/850932 | Devices and methods for reducing stress on circuit components | Jun 26, 2022 | Issued |
Array
(
[id] => 19943605
[patent_doc_number] => 12315741
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-05-27
[patent_title] => Method of manufacturing electronic device with reduced substrate warpage
[patent_app_type] => utility
[patent_app_number] => 17/850999
[patent_app_country] => US
[patent_app_date] => 2022-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 0
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850999
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/850999 | Method of manufacturing electronic device with reduced substrate warpage | Jun 26, 2022 | Issued |
Array
(
[id] => 19384838
[patent_doc_number] => 20240274708
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/566891
[patent_app_country] => US
[patent_app_date] => 2022-06-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6609
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18566891
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/566891 | SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE | Jun 26, 2022 | Pending |
Array
(
[id] => 18866126
[patent_doc_number] => 20230420563
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-28
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/849424
[patent_app_country] => US
[patent_app_date] => 2022-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8773
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849424
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/849424 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF | Jun 23, 2022 | Issued |
Array
(
[id] => 18688461
[patent_doc_number] => 11784207
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-10
[patent_title] => Method for forming an image sensor
[patent_app_type] => utility
[patent_app_number] => 17/843088
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 27
[patent_no_of_words] => 12970
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843088
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/843088 | Method for forming an image sensor | Jun 16, 2022 | Issued |
Array
(
[id] => 19957365
[patent_doc_number] => 12327784
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-10
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 17/839413
[patent_app_country] => US
[patent_app_date] => 2022-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 19
[patent_no_of_words] => 0
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839413
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/839413 | Semiconductor package | Jun 12, 2022 | Issued |
Array
(
[id] => 19783284
[patent_doc_number] => 12232339
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-18
[patent_title] => Nanomaterial, preparation method thereof, and semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/838701
[patent_app_country] => US
[patent_app_date] => 2022-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5471
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17838701
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/838701 | Nanomaterial, preparation method thereof, and semiconductor device | Jun 12, 2022 | Issued |