
Duc M. Pham
Examiner (ID: 7377, Phone: (571)272-5026 , Office: P/2836 )
| Most Active Art Unit | 2836 |
| Art Unit(s) | 2836, 2849 |
| Total Applications | 908 |
| Issued Applications | 788 |
| Pending Applications | 62 |
| Abandoned Applications | 83 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18967450
[patent_doc_number] => 11901230
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-13
[patent_title] => Semiconductor package and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/460317
[patent_app_country] => US
[patent_app_date] => 2021-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 38
[patent_no_of_words] => 13252
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460317
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/460317 | Semiconductor package and manufacturing method thereof | Aug 29, 2021 | Issued |
Array
(
[id] => 18874739
[patent_doc_number] => 11862562
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Integrated circuit conductive line arrangement for circuit structures, and method
[patent_app_type] => utility
[patent_app_number] => 17/459756
[patent_app_country] => US
[patent_app_date] => 2021-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 31
[patent_no_of_words] => 23207
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459756
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/459756 | Integrated circuit conductive line arrangement for circuit structures, and method | Aug 26, 2021 | Issued |
Array
(
[id] => 20259063
[patent_doc_number] => 12431428
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-30
[patent_title] => Integrated circuits and methods for power delivery
[patent_app_type] => utility
[patent_app_number] => 17/459840
[patent_app_country] => US
[patent_app_date] => 2021-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 7228
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459840
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/459840 | Integrated circuits and methods for power delivery | Aug 26, 2021 | Issued |
Array
(
[id] => 18857285
[patent_doc_number] => 11854880
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Memory device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/411094
[patent_app_country] => US
[patent_app_date] => 2021-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6371
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411094
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/411094 | Memory device and method for manufacturing the same | Aug 24, 2021 | Issued |
Array
(
[id] => 17277834
[patent_doc_number] => 20210384032
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-09
[patent_title] => Diamond Semiconductor System And Method
[patent_app_type] => utility
[patent_app_number] => 17/410427
[patent_app_country] => US
[patent_app_date] => 2021-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7939
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17410427
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/410427 | Diamond semiconductor system and method | Aug 23, 2021 | Issued |
Array
(
[id] => 19973924
[patent_doc_number] => 12342557
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-24
[patent_title] => Semiconductor device and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/405733
[patent_app_country] => US
[patent_app_date] => 2021-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 42
[patent_no_of_words] => 11923
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17405733
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/405733 | Semiconductor device and method of manufacturing the same | Aug 17, 2021 | Issued |
Array
(
[id] => 17262720
[patent_doc_number] => 20210375705
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-02
[patent_title] => METHOD TO MANUFACTURE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/401010
[patent_app_country] => US
[patent_app_date] => 2021-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8905
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401010
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/401010 | Method to manufacture semiconductor device | Aug 11, 2021 | Issued |
Array
(
[id] => 18721455
[patent_doc_number] => 11798809
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Semiconductor device and method of manufacturing
[patent_app_type] => utility
[patent_app_number] => 17/397632
[patent_app_country] => US
[patent_app_date] => 2021-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 7309
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397632
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/397632 | Semiconductor device and method of manufacturing | Aug 8, 2021 | Issued |
Array
(
[id] => 17566576
[patent_doc_number] => 20220130725
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-28
[patent_title] => THROUGH SILICON VIA AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/394372
[patent_app_country] => US
[patent_app_date] => 2021-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4703
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 289
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394372
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/394372 | Through silicon via and method of manufacturing the same | Aug 3, 2021 | Issued |
Array
(
[id] => 17403072
[patent_doc_number] => 20220045163
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => Ultra-High Voltage Resistor with Voltage Sense
[patent_app_type] => utility
[patent_app_number] => 17/443967
[patent_app_country] => US
[patent_app_date] => 2021-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4441
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17443967
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/443967 | Ultra-high voltage resistor with voltage sense | Jul 28, 2021 | Issued |
Array
(
[id] => 17232537
[patent_doc_number] => 20210359094
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-18
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME
[patent_app_type] => utility
[patent_app_number] => 17/386474
[patent_app_country] => US
[patent_app_date] => 2021-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386474
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/386474 | Semiconductor structure and method for forming same | Jul 26, 2021 | Issued |
Array
(
[id] => 18138999
[patent_doc_number] => 20230012834
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-19
[patent_title] => SEMICONDUCTOR DEVICE WITH DEEPLY DEPLETED CHANNEL AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/379962
[patent_app_country] => US
[patent_app_date] => 2021-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6149
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379962
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/379962 | Semiconductor device with deeply depleted channel and manufacturing method thereof | Jul 18, 2021 | Issued |
Array
(
[id] => 19907860
[patent_doc_number] => 12284890
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-22
[patent_title] => Display panel
[patent_app_type] => utility
[patent_app_number] => 17/764479
[patent_app_country] => US
[patent_app_date] => 2021-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 41
[patent_figures_cnt] => 42
[patent_no_of_words] => 8962
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17764479
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/764479 | Display panel | Jun 24, 2021 | Issued |
Array
(
[id] => 19079561
[patent_doc_number] => 11948941
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => Semiconductor device, integrated circuit and methods of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/355206
[patent_app_country] => US
[patent_app_date] => 2021-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 19
[patent_no_of_words] => 12335
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355206
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/355206 | Semiconductor device, integrated circuit and methods of manufacturing the same | Jun 22, 2021 | Issued |
Array
(
[id] => 17615856
[patent_doc_number] => 20220158136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-19
[patent_title] => DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND DISPLAYING DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/356364
[patent_app_country] => US
[patent_app_date] => 2021-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8264
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17356364
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/356364 | Display panel, manufacturing method thereof, and displaying device | Jun 22, 2021 | Issued |
Array
(
[id] => 17145333
[patent_doc_number] => 20210313346
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => Integrated Assemblies Having One or More Modifying Substances Distributed Within Semiconductor Material, and Methods of Forming Integrated Assemblies
[patent_app_type] => utility
[patent_app_number] => 17/347587
[patent_app_country] => US
[patent_app_date] => 2021-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8006
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347587
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/347587 | Integrated assemblies having one or more modifying substances distributed within semiconductor material, and methods of forming integrated assemblies | Jun 14, 2021 | Issued |
Array
(
[id] => 18983554
[patent_doc_number] => 11908742
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Semiconductor device having merged epitaxial features with arc-like bottom surface and method of making the same
[patent_app_type] => utility
[patent_app_number] => 17/347332
[patent_app_country] => US
[patent_app_date] => 2021-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 29
[patent_no_of_words] => 8253
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347332
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/347332 | Semiconductor device having merged epitaxial features with arc-like bottom surface and method of making the same | Jun 13, 2021 | Issued |
Array
(
[id] => 18857302
[patent_doc_number] => 11854897
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Asymmetric source/drain epitaxy
[patent_app_type] => utility
[patent_app_number] => 17/347064
[patent_app_country] => US
[patent_app_date] => 2021-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 31
[patent_no_of_words] => 12919
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17347064
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/347064 | Asymmetric source/drain epitaxy | Jun 13, 2021 | Issued |
Array
(
[id] => 17115568
[patent_doc_number] => 20210296165
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/343448
[patent_app_country] => US
[patent_app_date] => 2021-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8373
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17343448
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/343448 | Semiconductor device and a method of manufacturing the same | Jun 8, 2021 | Issued |
Array
(
[id] => 17115782
[patent_doc_number] => 20210296379
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => SOLID-STATE IMAGING DEVICE, MANUFACTURING METHOD THEREOF, AND ELECTRONIC APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/339324
[patent_app_country] => US
[patent_app_date] => 2021-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17517
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17339324
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/339324 | Solid-state imaging device, manufacturing method thereof, and electronic apparatus | Jun 3, 2021 | Issued |