
Duc T. Doan
Examiner (ID: 14386, Phone: (571)272-4171 , Office: P/2135 )
| Most Active Art Unit | 2185 |
| Art Unit(s) | 2135, 2188, 2185 |
| Total Applications | 730 |
| Issued Applications | 596 |
| Pending Applications | 8 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 908407
[patent_doc_number] => 07337281
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-26
[patent_title] => 'Storage system and data caching method in the system'
[patent_app_type] => utility
[patent_app_number] => 10/770007
[patent_app_country] => US
[patent_app_date] => 2004-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 10439
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/337/07337281.pdf
[firstpage_image] =>[orig_patent_app_number] => 10770007
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/770007 | Storage system and data caching method in the system | Feb 2, 2004 | Issued |
Array
(
[id] => 7006751
[patent_doc_number] => 20050172064
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-08-04
[patent_title] => 'Method and apparatus for addressing in mass storage non-volatile memory devices'
[patent_app_type] => utility
[patent_app_number] => 10/766320
[patent_app_country] => US
[patent_app_date] => 2004-01-29
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 10766320
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/766320 | Method and apparatus for addressing in mass storage non-volatile memory devices | Jan 28, 2004 | Abandoned |
Array
(
[id] => 7457040
[patent_doc_number] => 20040186966
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-23
[patent_title] => 'System chip and related method of data access'
[patent_app_type] => new
[patent_app_number] => 10/765897
[patent_app_country] => US
[patent_app_date] => 2004-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/765897 | System chip and related method of data access | Jan 28, 2004 | Abandoned |
Array
(
[id] => 481255
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[patent_kind] => B2
[patent_issue_date] => 2007-06-05
[patent_title] => 'Cache storage system that enables exclusion of locking of an area to be accessed'
[patent_app_type] => utility
[patent_app_number] => 10/764600
[patent_app_country] => US
[patent_app_date] => 2004-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/764600 | Cache storage system that enables exclusion of locking of an area to be accessed | Jan 26, 2004 | Issued |
Array
(
[id] => 7207978
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[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'Resource management in a processor-based system using hardware queues'
[patent_app_type] => utility
[patent_app_number] => 10/764967
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[patent_app_date] => 2004-01-26
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[firstpage_image] =>[orig_patent_app_number] => 10764967
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/764967 | Resource management in a processor-based system using hardware queues | Jan 25, 2004 | Abandoned |
Array
(
[id] => 7206669
[patent_doc_number] => 20050166013
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-28
[patent_title] => 'System and method for selecting command for execution in HDD based on benefit'
[patent_app_type] => utility
[patent_app_number] => 10/764946
[patent_app_country] => US
[patent_app_date] => 2004-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => publications/A1/0166/20050166013.pdf
[firstpage_image] =>[orig_patent_app_number] => 10764946
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/764946 | System and method for selecting command for execution in HDD based on benefit | Jan 25, 2004 | Issued |
Array
(
[id] => 7206725
[patent_doc_number] => 20050166024
[patent_country] => US
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[patent_issue_date] => 2005-07-28
[patent_title] => 'Method and apparatus for operating multiple security modules'
[patent_app_type] => utility
[patent_app_number] => 10/764918
[patent_app_country] => US
[patent_app_date] => 2004-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 6742
[patent_no_of_claims] => 32
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[pdf_file] => publications/A1/0166/20050166024.pdf
[firstpage_image] =>[orig_patent_app_number] => 10764918
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/764918 | Method and apparatus for operating multiple security modules | Jan 25, 2004 | Issued |
Array
(
[id] => 198171
[patent_doc_number] => 07639180
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-29
[patent_title] => 'Dynamic memory allocation and sharing in electronic systems'
[patent_app_type] => utility
[patent_app_number] => 10/762852
[patent_app_country] => US
[patent_app_date] => 2004-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
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[pdf_file] => patents/07/639/07639180.pdf
[firstpage_image] =>[orig_patent_app_number] => 10762852
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/762852 | Dynamic memory allocation and sharing in electronic systems | Jan 21, 2004 | Issued |
Array
(
[id] => 609459
[patent_doc_number] => 07155563
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-12-26
[patent_title] => 'Circuits to generate a sequential index for an input number in a pre-defined list of numbers'
[patent_app_type] => utility
[patent_app_number] => 10/763020
[patent_app_country] => US
[patent_app_date] => 2004-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/07/155/07155563.pdf
[firstpage_image] =>[orig_patent_app_number] => 10763020
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/763020 | Circuits to generate a sequential index for an input number in a pre-defined list of numbers | Jan 20, 2004 | Issued |
Array
(
[id] => 7442862
[patent_doc_number] => 20040210724
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-21
[patent_title] => 'Block data migration'
[patent_app_type] => new
[patent_app_number] => 10/762984
[patent_app_country] => US
[patent_app_date] => 2004-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0210/20040210724.pdf
[firstpage_image] =>[orig_patent_app_number] => 10762984
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/762984 | Block data migration | Jan 20, 2004 | Abandoned |
Array
(
[id] => 581617
[patent_doc_number] => 07159078
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-01-02
[patent_title] => 'Computer system embedding sequential buffers therein for performing a digital signal processing data access operation and a method thereof'
[patent_app_type] => utility
[patent_app_number] => 10/762170
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[pdf_file] => patents/07/159/07159078.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/762170 | Computer system embedding sequential buffers therein for performing a digital signal processing data access operation and a method thereof | Jan 20, 2004 | Issued |
Array
(
[id] => 7042162
[patent_doc_number] => 20050160218
[patent_country] => US
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[patent_issue_date] => 2005-07-21
[patent_title] => 'Highly integrated mass storage device with an intelligent flash controller'
[patent_app_type] => utility
[patent_app_number] => 10/761853
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/761853 | Highly integrated mass storage device with an intelligent flash controller | Jan 19, 2004 | Abandoned |
Array
(
[id] => 4472177
[patent_doc_number] => 07937551
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-03
[patent_title] => 'Storage systems having differentiated storage pools'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/761884 | Storage systems having differentiated storage pools | Jan 19, 2004 | Issued |
Array
(
[id] => 6999614
[patent_doc_number] => 20050138306
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[patent_kind] => A1
[patent_issue_date] => 2005-06-23
[patent_title] => 'Performance of operations on selected data in a storage area'
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Array
(
[id] => 7328668
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/739669 | Memory component with multiple transfer formats | Dec 17, 2003 | Abandoned |
Array
(
[id] => 6999600
[patent_doc_number] => 20050138298
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[patent_kind] => A1
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[patent_title] => 'Secondary path for coherency controller to interconnection network(s)'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/739694 | Secondary path for coherency controller to interconnection network(s) | Dec 17, 2003 | Issued |
Array
(
[id] => 6999547
[patent_doc_number] => 20050138281
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[patent_title] => 'Request processing order in a cache'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/739921 | Request processing order in a cache | Dec 17, 2003 | Abandoned |
Array
(
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Array
(
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Array
(
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[firstpage_image] =>[orig_patent_app_number] => 10740012
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/740012 | Memory component with synchronous data transfer | Dec 17, 2003 | Abandoned |